[PATCH] [RFC] ARM OMAP4: enable DSS by default
Christoph Fritz
chf.fritz at googlemail.com
Thu Apr 4 02:42:29 EDT 2013
On Fri, 2013-03-15 at 14:39 +0100, Christoph Fritz wrote:
> On Fri, 2013-03-15 at 12:40 +0400, Alexander Shiyan wrote:
>
> > MD command causes an error due to the inability of the reading memory area.
> > Error can be disabled via the option "enable arm exception handling support",
> > but it does not help solve the problem.
> > OMAP has a memory areas (modules), which are locked,
>
> This corresponds with my register observations. As noted above, register
> CM_DSS_DSS_CLKCTRL (0x4a009120) reads 0x00070F02 which means: "Module is
> disabled and cannot be accessed".
>
> > so you need to
> > search this information from datasheet.
>
> Finnaly I was very wise inspired to do "mw 0x4a009100 2". This disables
> the HW_AUTO-Mode (Automatic transition) and starts a software forced
> wake-up (SW_WKUP).
>
> Now even the IDLEST field from CM_DSS_CLKSTCTRL reads 0x0: "Module is
> fully functional, including INTRCONN" :-)
>
> et la voila:
> md 0x48040000+4
> 48040000: 00000040
>
> What do you think about the patch below?
>
> ---
> Subject: [PATCH] [RFC] ARM OMAP4: enable DSS by default
>
> This patch removes the anyway default reset setting of HW_AUTO in favour of
> SW_WKUP. So the DSS Module gets enabled and you gain full register access.
> ---
> arch/arm/mach-omap/omap4_clock.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/mach-omap/omap4_clock.c b/arch/arm/mach-omap/omap4_clock.c
> index 0621fd3..72335d9 100644
> --- a/arch/arm/mach-omap/omap4_clock.c
> +++ b/arch/arm/mach-omap/omap4_clock.c
> @@ -375,8 +375,8 @@ void omap4_enable_all_clocks(void)
> /* Check for DSS Clocks */
> while ((__raw_readl(0x4A009100) & 0xF00) != 0xE00)
> ;
> - /* Set HW_AUTO transition mode */
> - sr32(CM_DSS_CLKSTCTRL, 0, 32, 0x3);
> + /* Set SW_WKUP to enable DSS Module with full register access */
> + sr32(CM_DSS_CLKSTCTRL, 0, 32, 0x2);
>
> /* Enable SGX clocks */
> sr32(CM_SGX_CLKSTCTRL, 0, 32, 0x2);
*ping*
More information about the barebox
mailing list