[PATCH 3/3] miidev: fix 1G wrong detection

[Eric Bénard]

Hi,

Le Fri, 7 Sep 2012 10:52:16 +0200,
Johannes Stezenbach <js at sig21.net> a écrit :
> On Thu, Sep 06, 2012 at 09:39:31PM +0200, Eric Bénard wrote:
> > since 99e72c8bbdbdc690025a5868d831f1fe79ad56fc on an i.MX51 based board,
> > I get : "phy0: Link is up - 1000/Full". It seems miidev tries to probe
> > the PHY to early and gets 0x3ffff which leads to the wrong capabilities
> > setting.
> 
> Hm, MII registers are only 16bit, why does your mii_read()
> implementation return 0x3ffff?
> 
in fec_imx it returns the 32 bit register. I though we could mask it to
only return the data but that wouldn't solve the problem as the tests
in miidev would fail because the data is 0xFFFF.

> Also, what exactly do you mean by "too early"?  Your code
> shouldn't call mii_register() before the MDIO clock is stable.
> 
fec_imx.c does that.

Eric