[PATCH 4/4] Revert "mtd: atmel_nand: optimize read/write buffer functions"

[张忠山]

> >
> > This patch resolves my problem
> I'm expecting to see your patches
>

My first patch very simple:

------------------
diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c
index 0477178..a111463 100644
--- a/drivers/mtd/nand/atmel_nand.c
+++ b/drivers/mtd/nand/atmel_nand.c
@@ -155,23 +155,6 @@ static int atmel_nand_device_ready(struct mtd_info *mtd)
 }

 /*
- * Minimal-overhead PIO for data access.
- */
-static void atmel_read_buf(struct mtd_info *mtd, u8 *buf, int len)
-{
-       struct nand_chip *chip = mtd->priv;
-
-       memcpy_fromio(buf, chip->IO_ADDR_R, len);
-}
-
-static void atmel_write_buf(struct mtd_info *mtd, const u8 *buf, int len)
-{
-       struct nand_chip *chip = mtd->priv;
-
-       memcpy_toio(chip->IO_ADDR_W, buf, len);
-}
-
-/*
  * Return number of ecc bytes per sector according to sector size and
  * correction capability
  *
@@ -1115,8 +1098,9 @@ static int __init atmel_nand_probe(struct device_d *dev)
        if (host->board->bus_width_16)          /* 16-bit bus width */
                nand_chip->options |= NAND_BUSWIDTH_16;

-       nand_chip->read_buf = atmel_read_buf;
-       nand_chip->write_buf = atmel_write_buf;
+       /* use default */
+       nand_chip->read_buf = NULL;
+       nand_chip->write_buf = NULL;

        atmel_nand_enable(host);
------------------

After seeing your patch, I suppose the flowing patch may be works.
The idea is use optimized read/write function when 2**ale >= pagesize
and 2**cle >= pagesize.

I can't test it because the ale = a7, cle = a6 on my board, but
pagesize is 2048

------------------
diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c
index 0477178..66cf5db 100644
--- a/drivers/mtd/nand/atmel_nand.c
+++ b/drivers/mtd/nand/atmel_nand.c
@@ -1115,8 +1115,8 @@ static int __init atmel_nand_probe(struct device_d *dev)
        if (host->board->bus_width_16)          /* 16-bit bus width */
                nand_chip->options |= NAND_BUSWIDTH_16;

-       nand_chip->read_buf = atmel_read_buf;
-       nand_chip->write_buf = atmel_write_buf;
+       nand_chip->read_buf = NULL;
+       nand_chip->write_buf = NULL;

        atmel_nand_enable(host);

@@ -1151,6 +1151,11 @@ static int __init atmel_nand_probe(struct device_d *dev)
                        goto err_hw_ecc;
        }

+       if((1 << pdata->ale) >= mtd->writesize && (1 << pdata->cle) >= mtd->writesize) {
+               nand_chip->read_buf = atmel_read_buf;
+               nand_chip->write_buf = atmel_write_buf;
+       }
+
        /* second phase scan */
        if (nand_scan_tail(mtd)) {
                res = -ENXIO;
------------------

-- 
Best Regards,
zzs