[PATCH v2 3/3] MIPS: cpuinfo: import CPU message from Linux 3.4

[Antony Pavlov]

Signed-off-by: Antony Pavlov <antonynpavlov at gmail.com>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj at jcrosoft.com>
---
 arch/mips/lib/cpuinfo.c |   27 +++++++++++++++++++++++++--
 1 file changed, 25 insertions(+), 2 deletions(-)

diff --git a/arch/mips/lib/cpuinfo.c b/arch/mips/lib/cpuinfo.c
index fc8fb00..c0bb87a 100644
--- a/arch/mips/lib/cpuinfo.c
+++ b/arch/mips/lib/cpuinfo.c
@@ -23,11 +23,34 @@
 #include <common.h>
 #include <command.h>
 #include <asm/mipsregs.h>
+#include <asm/cpu-info.h>
+
+static char *way_string[] = { NULL, "direct mapped", "2-way",
+	"3-way", "4-way", "5-way", "6-way", "7-way", "8-way"
+};
 
 static int do_cpuinfo(int argc, char *argv[])
 {
-	printf("CP0_PRID = 0x%08x\n", read_c0_prid());
-	printf("CP0_CONFIG = 0x%08x\n", read_c0_config());
+	unsigned int icache_size, dcache_size;
+	struct cpuinfo_mips *c = &current_cpu_data;
+
+	printk(KERN_INFO "CPU revision is: %08x (%s)\n",
+		current_cpu_data.processor_id, __cpu_name);
+
+	icache_size = c->icache.sets * c->icache.ways * c->icache.linesz;
+	dcache_size = c->dcache.sets * c->dcache.ways * c->dcache.linesz;
+
+	printk("Primary instruction cache %ldkB, %s, %s, linesize %d bytes.\n",
+	       icache_size >> 10,
+	       c->icache.flags & MIPS_CACHE_VTAG ? "VIVT" : "VIPT",
+	       way_string[c->icache.ways], c->icache.linesz);
+
+	printk("Primary data cache %ldkB, %s, %s, %s, linesize %d bytes\n",
+	       dcache_size >> 10, way_string[c->dcache.ways],
+	       (c->dcache.flags & MIPS_CACHE_PINDEX) ? "PIPT" : "VIPT",
+	       (c->dcache.flags & MIPS_CACHE_ALIASES) ?
+			"cache aliases" : "no aliases",
+	       c->dcache.linesz);
 
 	return 0;
 }
-- 
1.7.10