i.MX23/i.MX28, software reset feature

[Juergen Beisert]

Hi list,

currently we use the watchdog to make the "reset" command work on the 
i.XM23/i.MX28 CPUs. This collides if someone wants to use the watchdog in a 
regular manner, as Barebox cannot distinguish if the reset was a result of 
the "reset" command (or "reboot" from Linux) or if something strange happens 
and the watchdog has barked to reboot and try again (maybe in a different 
manner).

The i.XM23/i.MX28 CPUs are coming with a bit in a special register in 
the "clock generation and control" unit to hard reset the whole SoC. This 
could be used instead to make the "reset" command work. But the register 
offsets are different in both SoCs. So:

 - using ifdefs to distinguish both SoCs in "arch/arm/mach-mxs/reset-imx.c"
 - or moving the reset_cpu() function into "arch/arm/mach-mxs/speed-imx*.c"
   where all the required symbols and correct offset are already defined on a
   per SoC base?

jbe

-- 
Pengutronix e.K.                              | Juergen Beisert             |
Linux Solutions for Science and Industry      | http://www.pengutronix.de/  |