[PATCH 2/4] ARM/Samsung: add support to detect the reset source

Juergen Beisert jbe at pengutronix.de
Wed Jul 18 04:46:48 EDT 2012


Signed-off-by: Juergen Beisert <jbe at pengutronix.de>
---
 arch/arm/mach-samsung/Makefile       |    1 +
 arch/arm/mach-samsung/reset_source.c |   56 ++++++++++++++++++++++++++++++++++
 2 files changed, 57 insertions(+)
 create mode 100644 arch/arm/mach-samsung/reset_source.c

diff --git a/arch/arm/mach-samsung/Makefile b/arch/arm/mach-samsung/Makefile
index 6020587..f7db1f7 100644
--- a/arch/arm/mach-samsung/Makefile
+++ b/arch/arm/mach-samsung/Makefile
@@ -1,4 +1,5 @@
 obj-y += s3c-timer.o generic.o
+obj-$(CONFIG_RESET_SOURCE) += reset_source.o
 obj-lowlevel-$(CONFIG_ARCH_S3C24xx) += lowlevel-s3c24x0.o
 obj-lowlevel-$(CONFIG_ARCH_S5PCxx) += lowlevel-s5pcxx.o
 obj-$(CONFIG_ARCH_S3C24xx) += gpio-s3c24x0.o s3c24xx-clocks.o mem-s3c24x0.o
diff --git a/arch/arm/mach-samsung/reset_source.c b/arch/arm/mach-samsung/reset_source.c
new file mode 100644
index 0000000..2456e3f
--- /dev/null
+++ b/arch/arm/mach-samsung/reset_source.c
@@ -0,0 +1,56 @@
+/*
+ * (C) Copyright 2012 Juergen Beisert - <kernel at pengutronix.de>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <common.h>
+#include <init.h>
+#include <io.h>
+#include <reset_source.h>
+#include <mach/s3c-iomap.h>
+
+/* S3C2440 relevant */
+#define S3C2440_GSTATUS2 0xb4
+# define S3C2440_GSTATUS2_PWRST (1 << 0)
+# define S3C2440_GSTATUS2_SLEEPRST (1 << 1)
+# define S3C2440_GSTATUS2_WDRST (1 << 2)
+
+static int s3c_detect_reset_source(void)
+{
+	u32 reg = readl(S3C_GPIO_BASE + S3C2440_GSTATUS2);
+
+	if (reg & S3C2440_GSTATUS2_PWRST) {
+		set_reset_source(RESET_POR);
+		writel(S3C2440_GSTATUS2_PWRST,
+					S3C_GPIO_BASE + S3C2440_GSTATUS2);
+		return 0;
+	}
+
+	if (reg & S3C2440_GSTATUS2_SLEEPRST) {
+		set_reset_source(RESET_WKE);
+		writel(S3C2440_GSTATUS2_SLEEPRST,
+					S3C_GPIO_BASE + S3C2440_GSTATUS2);
+		return 0;
+	}
+
+	if (reg & S3C2440_GSTATUS2_WDRST) {
+		set_reset_source(RESET_WDG);
+		writel(S3C2440_GSTATUS2_WDRST,
+					S3C_GPIO_BASE + S3C2440_GSTATUS2);
+		return 0;
+	}
+
+	/* else keep the default 'unknown' state */
+	return 0;
+}
+
+device_initcall(s3c_detect_reset_source);
-- 
1.7.10.4




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