[PATCH 3/5] imx35: mmc clock has 6 bit divider, not 3_3
Marc Reilly
marc at cpdesign.com.au
Sun Jul 15 21:04:57 EDT 2012
Signed-off-by: Marc Reilly <marc at cpdesign.com.au>
---
According to MCIMX35RM rev 3
arch/arm/mach-imx/speed-imx35.c | 3 ++-
1 files changed, 2 insertions(+), 1 deletions(-)
diff --git a/arch/arm/mach-imx/speed-imx35.c b/arch/arm/mach-imx/speed-imx35.c
index 905ab47..6d4236a 100644
--- a/arch/arm/mach-imx/speed-imx35.c
+++ b/arch/arm/mach-imx/speed-imx35.c
@@ -170,10 +170,11 @@ unsigned long imx_get_uartclk(void)
return imx_get_ppllclk() / div;
}
+/* mmc0 clk only */
unsigned long imx_get_mmcclk(void)
{
unsigned long pdr3 = readl(IMX_CCM_BASE + CCM_PDR3);
- unsigned long div = get_3_3_div(pdr3);
+ unsigned long div = get_6_div(pdr3);
if (pdr3 & (1 << 6))
return imx_get_armclk() / div;
--
1.7.7
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