[PATCH 3/5] imx-ipu-fb: Fix offset for IPU Clock.

[Teresa Gámez]

The offset for the IPU Clock in the CGR1 register is 18 not 22.
See MCIMX35RM table 14-17.

Signed-off-by: Teresa Gámez <t.gamez at phytec.de>
---
 drivers/video/imx-ipu-fb.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/drivers/video/imx-ipu-fb.c b/drivers/video/imx-ipu-fb.c
index a3fdb76..385f574 100644
--- a/drivers/video/imx-ipu-fb.c
+++ b/drivers/video/imx-ipu-fb.c
@@ -735,7 +735,7 @@ static void ipu_fb_enable(struct fb_info *info)
 
 	/* Start the clock */
 	reg = readl(IMX_CCM_BASE + CCM_CGR1);
-	reg |= (3 << 22);
+	reg |= (3 << 18);
 	writel(reg, IMX_CCM_BASE + CCM_CGR1);
 
 	/* ipu_idmac.c::ipu_idmac_init() */
-- 
1.7.0.4