[PATCH] NAND Flash SMC timings update (nwe_pulse) for calao board based on AT91SAM9G20 SoC

[gregory hermant]

Signed-off-by: Gregory Hermant <gregory.hermant at calao-systems.com>
---
 arch/arm/boards/tny-a926x/init.c |    2 +-
 arch/arm/boards/usb-a926x/init.c |    2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boards/tny-a926x/init.c b/arch/arm/boards/tny-a926x/init.c
index d58132a..5538a44 100644
--- a/arch/arm/boards/tny-a926x/init.c
+++ b/arch/arm/boards/tny-a926x/init.c
@@ -89,7 +89,7 @@ static struct sam9_smc_config tny_a9g20_nand_smc_config = {
 	.ncs_read_pulse		= 4,
 	.nrd_pulse		= 4,
 	.ncs_write_pulse	= 4,
-	.nwe_pulse		= 2,
+	.nwe_pulse		= 4,
 
 	.read_cycle		= 7,
 	.write_cycle		= 7,
diff --git a/arch/arm/boards/usb-a926x/init.c b/arch/arm/boards/usb-a926x/init.c
index 7e63876..00a215d 100644
--- a/arch/arm/boards/usb-a926x/init.c
+++ b/arch/arm/boards/usb-a926x/init.c
@@ -90,7 +90,7 @@ static struct sam9_smc_config usb_a9g20_nand_smc_config = {
 	.ncs_read_pulse		= 4,
 	.nrd_pulse		= 4,
 	.ncs_write_pulse	= 4,
-	.nwe_pulse		= 2,
+	.nwe_pulse		= 4,
 
 	.read_cycle		= 7,
 	.write_cycle		= 7,
-- 
1.5.6.3