[RFC] S3C24xx: Fixing the NAND handling
plagnioj at jcrosoft.com
Mon Mar 7 21:44:03 EST 2011
On 13:08 Tue 08 Mar , Zoltán Kócsi wrote:
> On Mon, 7 Mar 2011 14:24:13 +0100
> Juergen Beisert <jbe at pengutronix.de> wrote:
> > - the driver's local OOB layout for small page NANDs overwrites the
> > vendors bad block marker (a really bad idea!)
> > - the ECC setup for large page NANDs violates NANDs partial write
> > count (it forces 8 partial writes instead of allowed 4 per 2048 byte
> > page)
> > How to adapt barebox according to the kernel? If we do OOB and ECC
> > setup correctly in barebox, the mainline kernel cannot work with this
> > data. If we do it in the same way than the kernel, we lose the bad
> > block markers or do more writes than the manufacturer allows for
> > reliable data security.
> > Changing the kernel is also hard to do, because it breaks existing
> > software installations which should just run with more recent kernels.
> I believe that kernel has to be fixed. If it is broken and violates the
> chip manufacturer's speifications, then you can't (or shouldn't) use it
> on the field anyway. In that case you have to accept that upgrading the
> kernel will mean that you also have to rewrite whatever code you have
> which depends on the *incorrect* treatment of the hardware.
> Prolonging the existence of mistreatment of hardware in the name of
> backward compatibility is not a good thing, I believe.
I agree but you may have device on the market that use it and depond on it to
boot as you can not change the bootloader so you do need to detect it
or make the old way optionnal at least and use the correct one as default
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