OMAP 3530 arch_shutdown "undefined instruction"
Orjan Friberg
of at flatfrog.com
Thu May 27 07:03:27 EDT 2010
On 2010-05-27 11:31, Sascha Hauer wrote:
> Seems this does not work on Cortex Processors. Can you try replacing
> this with the following please:
>
> asm volatile (
> "bl __mmu_cache_flush;"
> "bl __mmu_cache_off;"
> :
> :
> : "r0", "r1", "r2", "r3", "r6", "r10", "r12", "cc", "memory"
> );
Thanks, this seems to work fine (in the sense that I can load and run a
second stage bootloader; I haven't tried verifying what happens with the
I and D cache).
--
Orjan Friberg
FlatFrog Laboratories AB
More information about the barebox
mailing list