khc at pm.waw.pl
Sat Feb 6 16:00:42 EST 2010
I'm thinking about adding Barebox support for a certain platform using
IXP425 (ARM, usually big-endian) CPU. This means the startup code
(trivial, already got it working in little-endian mode), drivers for
hardware Queue Manager, Network Processing Engines and built-in Ethernet
interfaces (all of them easy to port from Linux).
This also means supporting the NOR flash: the CPU has 16-bit, always
big-endian, "value-preserving" EXP bus for connecting such devices. In
LE mode the address has to be XORed with 2, and if it's byte-oriented
data (i.e. not a command/response), it has to be byte-swapped. Only
16-bit writes can be made.
Doing the above in the flash driver would complicate things a lot. The
drivers currently use plain pointers to access the flash. I'm thinking
about moving the low-level access (R/W) routines to arch code (with a
generic defaults), and calling them via the NOR flash platform struct
(which doesn't do anything useful ATM).
The above would also permit supporting flashes which can't be mapped in
normal CPU address space. It would be a bit slower, though.
More information about the barebox