[PATCH v4 08/11] PCI: qcom: Add support for PCIe pre/post_link_speed_change()

[Bjorn Helgaas]

On Mon, Jun 09, 2025 at 04:21:29PM +0530, Krishna Chaitanya Chundru wrote:
> QCOM PCIe controllers need to disable ASPM before initiating link
> re-train. So as part of pre_link_speed_change() disable ASPM and as
> part of post_link_speed_change() enable ASPM back.

Is this a QCOM defect?  Or is there something in the PCIe spec about
needing to disable ASPM during retrain?  What about
pcie_retrain_link()?  Does that work on QCOM?

> +++ b/drivers/pci/controller/dwc/pcie-qcom.c
> @@ -276,10 +276,16 @@ struct qcom_pcie {
>  	struct dentry *debugfs;
>  	bool suspended;
>  	bool use_pm_opp;
> +	int aspm_state; /* Store ASPM state used in pre & post link speed change */

Whatever this is, it's definitely not an int.  Some kind of unsigned
thing of specified size, at least.