[PATCH] realtek/rtl839x: Edgecore ECS4100-12PH support
Sander Vanheule
sander at svanheule.net
Thu Apr 4 12:12:06 PDT 2024
Hi Stijn,
On Thu, 2024-04-04 at 17:28 +0300, stijn at linux-ipv6.be wrote:
> Add support for the Edgecore ECS4100-12PH, an 8-port PoE Gigabit
> Ethernet switch with 2 combo RJ45/SFP and 2 SFP ports.
>
> Hardware:
> * SoC: RTL8392M
> * RAM: 256MiB
> * Flash: 32MiB SPI-NOR
> * Ethernet:
> * 8x GbE RJ45 PoE (built-in RTL8218B)
According to the board picture, that's not a built-in RTL8218B ;-)
> * 2x GbE RJ45 / SFP combo
> * 2x SFP
Any idea if these go to the RTL8214FC or straight to the SoC?
> * Console: RJ45 RS232 port on front panel
> * PoE: Nuvoton M0516 + 2x Broadcom BCM59121 PSE
>
> Installation via bootloader:
> * open serial console (baud rate 115200)
> * interrupt boot process by pressing any key during boot
> * boot the OpenWrt initramfs:
> # rtk network on
> # setenv bootcmd 'mtdparts default;sf probe 0;sf read 0x81000000 0x00200000
> 0x400000;bootm'
This is only 4MiB. Does it limit the total total image size or just the kernel size?
I suppose this also means flashing (initramfs) images from the vendor interface does not
work?
> # tftpboot 0x8f000000 /tftpboot/openwrt-realtek-rtl839x-edgecore_ecs4100-12ph-
> initramfs-kernel.bin
> # bootm
> * copy openwrt-realtek-rtl839x-edgecore_ecs4100-12ph-squashfs-sysupgrade.bin
> to /tmp and use sysupgrade to install it:
> # sysupgrade /tmp/openwrt-realtek-rtl839x-edgecore_ecs4100-12ph-squashfs-
> sysupgrade.bin
>
> Signed-off-by: Stijn Tintel <stijn at linux-ipv6.be>
> ---
> I took the DTS from the TIP OpenWiFi project. It was introduced in the
> initial commit of their Github repo [1]. I added gpio1 and
> label-mac-device, and changed rtl838x-soc in the compatible line to
> rtl839x-soc. The info page and photo on svanheule's website suggest
> RTL8392M, while my units use RTL8393M. My units have the exact same P/N
> and revision on the PCB as in the photo. Since there appear to be units
> based on RTL8392M, I'll keep the original DTS filename unless someone
> tells me otherwise.
The RTL8392M and RTL8393M appear very similar in specs, so perhaps they are pin-
compatible. Either has a lot more switching capacity than what this device provides :-)
Did you check what your bootlog reports as chip ID?
>
> All 4 SFP slots seem to detect SFP insertion and removal, however I
> didn't manage to get a link on either of the ports. As I have very
> limited experience with SFP/fiber on Linux, I'd appreciate some guidance
> on how to test this properly.
This could also be due to a lacking implementation of the RTL8214FC phy. The SDK the
drivers are based on use register stuffing values for specific SoC/phy combinations,
without any form of documentation (i.e. hard to figure out what's going on). These are
provided as the "firmware" files in OpenWrt, so maybe this 8393/8214FC combination just
hasn't come up yet.
>
> [1]
> https://github.com/Telecominfraproject/wlan-ap/commit/528a778e3864064bfccd8295abd1ec23da778843
> ---
>
[...]
> diff --git a/target/linux/realtek/dts-5.15/rtl8392_edgecore_ecs4100-12ph.dts
> b/target/linux/realtek/dts-5.15/rtl8392_edgecore_ecs4100-12ph.dts
> new file mode 100644
> index 0000000000..067bf24f5a
> --- /dev/null
> +++ b/target/linux/realtek/dts-5.15/rtl8392_edgecore_ecs4100-12ph.dts
> @@ -0,0 +1,305 @@
> +// SPDX-License-Identifier: GPL-2.0-or-later
> +
> +#include "rtl839x.dtsi"
> +
> +#include <dt-bindings/input/input.h>
> +#include <dt-bindings/gpio/gpio.h>
> +
> +/ {
> + compatible = "edgecore,ecs4100-12ph", "realtek,rtl839x-soc";
> + model = "Edgecore ECS4100-12PH Switch";
> +
> + aliases {
> + label-mac-device = ðernet0;
> + led-boot = &led_sys;
> + led-failsafe = &led_sys;
> + led-running = &led_sys;
> + led-upgrade = &led_sys;
> + };
> +
> + chosen {
> + bootargs = "console=ttyS0,115200";
> + };
> +
> + memory at 0 {
> + device_type = "memory";
> + reg = <0x0 0x10000000>;
> + };
> +
> + gpio1: rtl8231-gpio {
> + compatible = "realtek,rtl8231-gpio";
> + #gpio-cells = <2>;
> + indirect-access-bus-id = <3>;
> + gpio-controller;
> + };
> +
> + /* i2c of the left SFP cage: port 9 */
Only a comment for this node, but not for the others? You can leave this one out.
> + i2c0: i2c-gpio-0 {
> + compatible = "i2c-gpio";
> + sda-gpios = <&gpio1 6 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
> + scl-gpios = <&gpio1 7 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
> + i2c-gpio,delay-us = <2>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + };
> +
> + sfp0: sfp-p9 {
> + compatible = "sff,sfp";
> + i2c-bus = <&i2c0>;
> + los-gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>;
> + mod-def0-gpio = <&gpio1 8 GPIO_ACTIVE_LOW>;
Interesting to see they mixed internal and external GPIOs. (I'm guessing this allows the
kernel to support interrupts on the LoS line)
[...]
> +
> + i2c4: i2c-gpio-4 {
> + compatible = "i2c-gpio";
> + sda-gpios = <&gpio1 29 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
> + scl-gpios = <&gpio1 30 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
> + i2c-gpio,delay-us = <2>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + adt7470 at 2f {
> + compatible = "adi,adt7470";
> + reg = <0x2f>;
> + };
> +
> + lm75b at 48 {
> + compatible = "nxp,lm75a";
> + reg = <0x48>;
> + };
Can you use this to define a thermal zone? See e.g. rtl8393_panasonic_m48eg-pn28480k.dts
> +
> + eeprom at 506 {
> + compatible = "atmel,24c32";
> + reg = <0x56>;
> + };
Any idea what is stored here?
> + };
> +
> + watchdog {
> + compatible = "linux,wdt-gpio";
> + gpios = <&gpio0 20 GPIO_ACTIVE_LOW>;
> + hw_algo = "toggle";
> + hw_margin_ms = <1200>;
> + };
> +
> + reboot at 0 {
You'll want to check the leading whitespaces in this file.
> + compatible = "edgecore,reboot";
> + gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>;
> + };
See Hiroshi's comment on gpio-restart.
> +
> + fan0: gpio-fan {
> + #cooling-cells = <2>;
> + compatible = "gpio-fan";
> + gpio-fan,speed-map = <0 0 3000 1>;
> + gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
> + status = "okay";
> + };
> +};
> +
> +&gpio0 {
> + poe_enable {
> + gpio-hog;
> + gpios = <16 GPIO_ACTIVE_HIGH>;
> + output-high;
> + };
> +
> + poe_reset {
> + gpio-hog;
> + gpios = <18 GPIO_ACTIVE_HIGH>;
> + output-high;
> + };
Active-high reset line hogged high? I'm reading this as "keep PoE permanently in reset".
Perhaps GPIO_ACTIVE_LOW with output-low is what you're looking for.
> +};
> +
> +&spi0 {
> + status = "okay";
> +
> + flash at 0 {
> + compatible = "jedec,spi-nor";
> + reg = <0>;
> + spi-max-frequency = <10000000>;
> +
> + partitions {
> + compatible = "fixed-partitions";
> + #address-cells = <1>;
> + #size-cells = <1>;
> +
> + partition at 0 {
> + label = "u-boot";
> + reg = <0x0 0x40000>;
> + read-only;
> + };
> + partition at 100000 {
> + label = "u-boot-env";
> + reg = <0x100000 0x100000>;
> + read-only;
> + };
Will you fold your the other changes in your tree into the partition layout?
[...]
> +
> +&switch0 {
> + ext_io: ext-io at e4 {
> + compatible = "realtek,rtl8390-eio", "syscon";
As Hiroshi noted, this driver doesn't exist in OpenWrt. A GPIO controlled LED also offers
a lot more flexibility than the two supported blinking rates in by hardware. See
rtl8393_zyxel_gs1900-48.dts for an example.
[...]
>
> +define Device/edgecore_ecs4100-12ph
> + SOC := rtl8392
> + DEVICE_VENDOR := Edgecore
> + DEVICE_MODEL := ECS4100-12PH
> + IMAGE_SIZE := 14336k
As mentioned above, you might also need to limit the kernel size to 4 MiB, if that's what
the bootloader supports.
Best,
Sander
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