[OpenWrt-Devel] [PATCH] ath79: ar7100: remove IRQ code from PCI driver

[Chuanhong Guo]

Dmitry Tunin <hanipouspilot at gmail.com> 于2018年8月23日周四 下午2:07写道：
>
> чт, 23 авг. 2018 г. в 6:36, Chuanhong Guo <gch981213 at gmail.com>:
> >
> > Dmitry Tunin <hanipouspilot at gmail.com> 于2018年8月23日周四 上午1:24写道：
> > >
> > > I looked into the specs and now I see that the
> > > AR71XX_RESET_REG_MISC_INT_STATUS is read-only on ar7100, so we need to
> > > change the compatible
> > > to "qca,ar7100-misc-intc" and also change it for the "real" misc
> > > controller. Writing to RO register makes no sense at all.
> > Please be aware that the access mode is *RO/RWC*, meaning *Read/Write to Clear*.
>
> I noticed that, and it is implemented, and only some bits are RWC.
This is true for ar7100. On other chips the entire
RST_MISC_INTERRUPT_STATUS block is marked as Read/Write-to-Clear.
> It makes no sense to have a separate ack done this way. It slow things down.
You can use an implementation without ack for PCI but you should keep
the one used for MISC_INTC unchanged.
>
> And we already tested it both ways. It works either way, but one way
> is faster than another.

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