[OpenWrt-Devel] [PATCH] ath79: reduce irq count in irq-ath79-misc.c

[Dmitry Tunin]

Oops. I looked into newer specs. Some chips now have 16.
ср, 22 авг. 2018 г. в 13:50, Dmitry Tunin <hanipouspilot at gmail.com>:
>
> According to specs this interrupt controller has 8 IRQs (0-7).
> If we reuse it for PCI, we need even less (0-4).
> We don't need that hude domain there.
>
> Signed-off-by: Dmitry Tunin <hanipouspilot at gmail.com>
> ---
>  .../0037-MIPS-ath79-irq-misc-reduce-irq-count.patch         | 13 +++++++++++++
>  1 file changed, 13 insertions(+)
>  create mode 100644 target/linux/ath79/patches-4.14/0037-MIPS-ath79-irq-misc-reduce-irq-count.patch
>
> diff --git a/target/linux/ath79/patches-4.14/0037-MIPS-ath79-irq-misc-reduce-irq-count.patch b/target/linux/ath79/patches-4.14/0037-MIPS-ath79-irq-misc-reduce-irq-count.patch
> new file mode 100644
> index 0000000..b9ab092
> --- /dev/null
> +++ b/target/linux/ath79/patches-4.14/0037-MIPS-ath79-irq-misc-reduce-irq-count.patch
> @@ -0,0 +1,13 @@
> +Index: linux-4.14.65/drivers/irqchip/irq-ath79-misc.c
> +===================================================================
> +--- linux-4.14.65.orig/drivers/irqchip/irq-ath79-misc.c
> ++++ linux-4.14.65/drivers/irqchip/irq-ath79-misc.c
> +@@ -21,7 +21,7 @@
> + #define AR71XX_RESET_REG_MISC_INT_STATUS      0
> + #define AR71XX_RESET_REG_MISC_INT_ENABLE      4
> +
> +-#define ATH79_MISC_IRQ_COUNT                  32
> ++#define AR71XX_MISC_IRQ_COUNT                 8
> +
> + static void ath79_misc_irq_handler(struct irq_desc *desc)
> + {
> --
> 2.7.4
>

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