[PATCH v6 2/6] platform: generic: spacemit: k1: rename cache flush operation
Anup Patel
anup at brainfault.org
Wed Oct 28 23:09:29 PDT 2026
On Wed, Oct 28, 2026 at 6:26 PM Troy Mitchell
<troy.mitchell at linux.spacemit.com> wrote:
>
> From: Xianbin Zhu <xianbin.zhu at linux.spacemit.com>
>
> MRAOP_ICACHE_INVALID is used to flush the local D-cache before a hart
> stops, so the name incorrectly describes I-cache invalidation. Rename
> it to MRAOP_CACHE_FLUSH without changing its encoded value.
>
> Signed-off-by: Xianbin Zhu <xianbin.zhu at linux.spacemit.com>
> Reviewed-by: E Shattow <e at freeshell.de>
> Co-developed-by: Troy Mitchell <troy.mitchell at linux.spacemit.com>
> Signed-off-by: Troy Mitchell <troy.mitchell at linux.spacemit.com>
LGTM.
Reviewed-by: Anup Patel <anup at brainfault.org>
Applied this patch to the riscv/opensbi repo.
Thanks,
Anup
> ---
> lib/utils/hsm/fdt_hsm_spacemit.c | 2 +-
> platform/generic/include/spacemit/k1.h | 3 +--
> 2 files changed, 2 insertions(+), 3 deletions(-)
>
> diff --git a/lib/utils/hsm/fdt_hsm_spacemit.c b/lib/utils/hsm/fdt_hsm_spacemit.c
> index 868e49bf..99c52335 100644
> --- a/lib/utils/hsm/fdt_hsm_spacemit.c
> +++ b/lib/utils/hsm/fdt_hsm_spacemit.c
> @@ -92,7 +92,7 @@ static int spacemit_hart_stop(void)
> asm volatile ("fence iorw, iorw");
>
> /* flush local dcache */
> - csr_write(CSR_MRAOP, MRAOP_ICACHE_INVALID);
> + csr_write(CSR_MRAOP, MRAOP_CACHE_FLUSH);
> asm volatile ("fence iorw, iorw");
>
> /* disable dcache */
> diff --git a/platform/generic/include/spacemit/k1.h b/platform/generic/include/spacemit/k1.h
> index 7095bc08..8d4f5344 100644
> --- a/platform/generic/include/spacemit/k1.h
> +++ b/platform/generic/include/spacemit/k1.h
> @@ -20,8 +20,7 @@
> /* ECC enable */
> #define MSETUP_ECCE BIT(16)
>
> -/* icache invalidation */
> -#define MRAOP_ICACHE_INVALID GENMASK(1, 0)
> +#define MRAOP_CACHE_FLUSH GENMASK(1, 0)
>
> #define PMU_AP_BASE 0xd4282800
>
>
> --
> 2.55.0
>
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