[PATCH] lib: pmu: Fix race on pmu_ctr_write_hw
Anup Patel
anup at brainfault.org
Sun Oct 25 01:14:02 PDT 2026
On Sun, Oct 25, 2026 at 1:28 AM Jakub Janeczko <kuba at ev1.pl> wrote:
>
> On platforms where a bit of mcountinhibit cannot be set to 1,
> and when on rv32, pmu_ctr_write_hw() was given value whose lower
> bits were close to 2^32, the write could miss the lower bit overflow.
>
> Signed-off-by: Jakub Janeczko <kuba at ev1.pl>
LGTM.
Reviewed-by: Anup Patel <anup at brainfault.org>
Applied this patch to the riscv/opensbi repo.
Thanks,
Anup
> ---
> lib/sbi/sbi_pmu.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/lib/sbi/sbi_pmu.c b/lib/sbi/sbi_pmu.c
> index e79f6b60..7dbc9407 100644
> --- a/lib/sbi/sbi_pmu.c
> +++ b/lib/sbi/sbi_pmu.c
> @@ -393,8 +393,8 @@ static void pmu_ctr_write_hw(uint32_t cidx, uint64_t ival)
> {
> #if __riscv_xlen == 32
> csr_write_num(CSR_MCYCLE + cidx, 0);
> - csr_write_num(CSR_MCYCLE + cidx, ival & 0xFFFFFFFF);
> csr_write_num(CSR_MCYCLEH + cidx, ival >> BITS_PER_LONG);
> + csr_write_num(CSR_MCYCLE + cidx, ival & 0xFFFFFFFF);
> #else
> csr_write_num(CSR_MCYCLE + cidx, ival);
> #endif
> --
> 2.56.0
>
>
> --
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