[PATCH v1 0/4] Add eager FP and RISC-V vector context switching support

[dave.patel at riscstar.com]

Hi,

This patch series adds support for eager floating-point and RISC-V vector
context save/restore in OpenSBI.

The goal is to ensure that machine-mode trap handling preserves the full
architectural state of lower privilege software (e.g., S-mode), providing
correct isolation across trap boundaries.

### Overview

This series introduces:

* Per-hart FP and vector context pointers in `sbi_scratch`
* FP context save/restore implementation
* RISC-V vector context save/restore implementation
* Integration into the OpenSBI trap handler

### Design

The implementation follows an eager context switching model:

* FP and vector state is saved on every trap entry
* FP and vector state is restored before returning from traps

This ensures correctness and avoids the need for lazy switching or
trap-on-first-use mechanisms.

### Context Storage

* FP context:

  * f0–f31 registers
  * fcsr

* Vector context:

  * v0–v31 registers
  * vl, vtype, vcsr

Stored per-hart via `sbi_scratch`.

### Notes / Assumptions

* Assumes FP and vector units are enabled when used (mstatus.FS/VS)
* Assumes RV64 for floating-point implementation (fsd/fld)
* Vector maximum size is bounded by SBI_MAX_VLENB
* Context pointers must be initialized before use

### Performance

This approach introduces additional overhead on every trap due to full
state save and restore, especially for vector state, but provides a
simple and deterministic model.

### Patch Breakdown

* Patch 1: Add FP context save/restore support
* Patch 2: Add vector context save/restore support
* Patch 3: Extend sbi_scratch with FP/vector context pointers
* Patch 4: Integrate into trap handler

Feedback is welcome, especially regarding:

* CSR restore ordering (vtype/vl/vcsr)
* Trap performance implications

Thanks,
Dave Patel