[PATCH 4/7] include: sbi: set FS dirty in vsstatus when V=1

[Anup Patel]

On Tue, Feb 10, 2026 at 3:12 PM Bo Gan <ganboing at gmail.com> wrote:
>
> According to Privileged ISA 19.2.11:
>
> Modifying the floating-point state when V=1 causes both fields
> (vsstatus.FS and the HS-level sstatus.FS) to be set to 3 (Dirty)
>
> Fixes: 130e65dd9d44 ("lib: sbi: Implement SET_FS_DIRTY() to make sure the mstatus FS dirty is set")
> Signed-off-by: Bo Gan <ganboing at gmail.com>

LGTM.

Reviewed-by: Anup Patel <anup at brainfault.org>

Regards,
Anup

> ---
>  include/sbi/riscv_fp.h | 6 +++++-
>  1 file changed, 5 insertions(+), 1 deletion(-)
>
> diff --git a/include/sbi/riscv_fp.h b/include/sbi/riscv_fp.h
> index 03011af9..ff1dbc87 100644
> --- a/include/sbi/riscv_fp.h
> +++ b/include/sbi/riscv_fp.h
> @@ -83,7 +83,11 @@
>  #define GET_FFLAGS() csr_read(CSR_FFLAGS)
>  #define SET_FFLAGS(value) csr_write(CSR_FFLAGS, (value))
>
> -#define SET_FS_DIRTY(regs) (regs->mstatus |= MSTATUS_FS)
> +#define SET_FS_DIRTY(regs) do {                                \
> +       if (sbi_regs_from_virt(regs))                   \
> +               csr_set(CSR_VSSTATUS, MSTATUS_FS);      \
> +       regs->mstatus |= MSTATUS_FS;                    \
> +} while(0)
>
>  #define GET_F32_RS1(insn, regs) (GET_F32_REG(insn, 15, regs))
>  #define GET_F32_RS2(insn, regs) (GET_F32_REG(insn, 20, regs))
> --
> 2.34.1
>