[PATCH 0/7] Fix and improve the Andes ATCSMU and LLC drivers
Ben Zong-You Xie
ben717 at andestech.com
Tue Jul 28 01:10:34 PDT 2026
Fixes and cleanups for the Andes last level cache, HSM and suspend
drivers, collected while bringing up suspend to RAM on the AE350
platform.
Below is the summary of this patch set:
- Patch 1 makes andes_llcache_enable() return 0 on success, as the
cache_enable() callback is documented to. Nothing checks it today, but
patch 7 does.
- Patch 2 puts the SMU and LLC register regions in the root domain, so
the supervisor can reach them under Smepmp.
- Patch 3 pairs the non-retentive CSR save and restore with an explicit
flag instead of inferring it from the boot count and sleep type.
- Patch 4 restores those CSRs on the system-suspend resume path, which
never reached the old call site.
- Patch 5 wakes a sleeping hart with a plain IPI and drops the SMU
WAKEUP_CMD path.
- Patch 6 polls the secondary harts until they are really asleep instead
of checking once.
- Patch 7 arms the SMU last and unwinds an aborted suspend rather than
leaving the hart half configured.
Signed-off-by: Ben Zong-You Xie <ben717 at andestech.com>
Ben Zong-You Xie (7):
lib: utils/cache: fix andes_llcache_enable() return value
lib: utils/andes: add the SMU and LLC registers to the root domain
platform: generic/andes: pair non-retentive CSR save/restore with a
flag
lib: utils/suspend: restore Andes CSRs on system-suspend resume
lib: utils/hsm: wake sleeping Andes harts with an IPI
lib: utils/suspend: wait for the secondary Andes harts to sleep
lib: utils/andes: arm the SMU sleep command last
include/sbi_utils/hsm/fdt_hsm_andes_atcsmu.h | 8 ++-
lib/utils/cache/fdt_andes_llcache.c | 23 +++++--
lib/utils/hsm/fdt_hsm_andes_atcsmu.c | 64 ++++++++----------
lib/utils/suspend/fdt_suspend_andes_atcsmu.c | 70 ++++++++++++++------
platform/generic/andes/ae350.c | 26 ++++++--
platform/generic/include/andes/andes.h | 4 ++
6 files changed, 129 insertions(+), 66 deletions(-)
--
2.34.1
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