[PATCH v3 23/23] platform: generic: eyeq7h: enable ECC on L1 cache

[Vladimir Kondratiev]

Signed-off-by: Vladimir Kondratiev <vladimir.kondratiev at mobileye.com>
---
 platform/generic/mips/eyeq7h.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/platform/generic/mips/eyeq7h.c b/platform/generic/mips/eyeq7h.c
index f09ec5f0fae4abec29ec9c15080411b0da7bbbde..242cbb3ce32706cf4d894649b9cf227932658936 100644
--- a/platform/generic/mips/eyeq7h.c
+++ b/platform/generic/mips/eyeq7h.c
@@ -436,6 +436,8 @@ static int eyeq7h_nascent_init(void)
 	/* Per hart set up */
 	/* Enable AMO and RDTIME illegal instruction exceptions. */
 	csr_set(CSR_MIPSCONFIG6, (1<<2)|(1<<1));
+	/* enable ECC for L1 I/D and FTLB */
+	csr_set(CSR_MIPSERRCTL, MIPSERRCTL_PE);
 
 	return 0;
 }

-- 
2.43.0