[PATCH RFC 2/3] platform: generic: Add sample dts overlay for testing hwirq/domain route rules

Raymond Mao raymondmaoca at gmail.com
Fri Feb 13 11:04:58 PST 2026


From: Raymond Mao <raymond.mao at riscstar.com>

Add sample dts overlay for testing hwirq/domain route rules.
Each domain uses property "opensbi,host-irqs" to describe one hwirq
route rule.
  'opensbi,host-irqs = <first_hwirq count> ...;'

During cold boot, route rules are converted and cached for VIRQ
routing/couriering purpose.

Usage:
1. Compile the overlay.
   $ dtc -@ -I dts -O dtb -o hwirq_bind_domain.dto \
         platform/generic/virt/hwirq_bind_domain.dts
2. Dump the base dtb from QEMU.
   $ qemu-system-riscv64 -M virt,aia=aplic-imsic -cpu rv64,zkr=on -m 4096 \
         -nographic -bios out/platform/generic/firmware/fw_jump.bin \
         -machine dumpdtb=qemu.dtb
3. Apply the overlay on the base.
   $ fdtoverlay -i qemu.dtb -o qemu_merge.dtb hwirq_bind_domain.dto
4. Re-run QEMU with adding argument '-dtb qemu_merge.dtb'

Signed-off-by: Raymond Mao <raymond.mao at riscstar.com>
---
 platform/generic/virt/hwirq_bind_domain.dts | 79 +++++++++++++++++++++
 1 file changed, 79 insertions(+)
 create mode 100644 platform/generic/virt/hwirq_bind_domain.dts

diff --git a/platform/generic/virt/hwirq_bind_domain.dts b/platform/generic/virt/hwirq_bind_domain.dts
new file mode 100644
index 00000000..b836901e
--- /dev/null
+++ b/platform/generic/virt/hwirq_bind_domain.dts
@@ -0,0 +1,79 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+	/*
+	 * Fragment 0: OpenSBI domain configuration under /chosen
+	 */
+	fragment at 0 {
+		target-path = "/chosen";
+		__overlay__ {
+			opensbi-domains {
+				compatible = "opensbi,domain,config";
+
+				/*
+				 * DRAM region for domain1 (2GB from 0x8000_0000).
+				 * base is 64-bit: <hi lo>, order is log2(size).
+				 */
+				memregion_dram_2g: memregion_dram_2g {
+					compatible = "opensbi,domain,memregion";
+					base  = <0x0 0x80000000>;
+					order = <31>;
+				};
+
+				/*
+				 * UART MMIO region so S-mode payload can access UART registers
+				 * without fault. 0x1000_0000 size 4KB.
+				 */
+				uart0_mmio: memregion_uart0 {
+					compatible = "opensbi,domain,memregion";
+					base  = <0x0 0x10000000>;
+					order = <12>;
+				};
+
+				/*
+				 * Domain instance:
+				 * - possible-harts = <cpu0 phandle> (your cpu at 0 phandle is 1)
+				 * - regions use label references (fdtoverlay will fixup phandles)
+				 * - opensbi,host-irqs uses <first count> pairs (NO chip phandle)
+				 */
+				domain1: domain1 {
+					compatible = "opensbi,domain,instance";
+
+					/* cpu at 0 phandle in your base qemu dtb is 1 */
+					possible-harts = <0x1>;
+
+					/*
+					 * Keep permissive for test.
+					 * access=0x3f: enable all M+SU R/W/X flags (test only).
+					 */
+					regions = <&memregion_dram_2g 0x3f>,
+						  <&uart0_mmio 0x3f>;
+
+					/*
+					 * Route rule: Bind host HWIRQs ranges to this domain.
+					 * Format: <first_hwirq count> ...
+					 * If no route rule matches, HWIRQs default to root domain.
+					 *
+					 * UART RX is hwirq=10 on QEMU virt:
+					 *   fdtget -t i qemu_merge.dtb /soc/serial at 10000000 interrupts
+					 *     => "10 4"
+					 *
+					 * Start with only <10 1> for clean bring-up.
+					 */
+					opensbi,host-irqs = <10 1>;
+				};
+			};
+		};
+	};
+
+	/*
+	 * Fragment 1: Assign cpu0 to domain1 using label reference
+	 */
+	fragment at 1 {
+		target-path = "/cpus/cpu at 0";
+		__overlay__ {
+			opensbi-domain = <&domain1>;
+		};
+	};
+};
\ No newline at end of file
-- 
2.25.1




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