[PATCH 5/8] lib: sbi_irqchip: Support irqchip device targetting subset of harts

Anup Patel anup.patel at oss.qualcomm.com
Thu Feb 12 20:01:28 PST 2026


On Mon, Feb 9, 2026 at 10:33 PM Samuel Holland
<samuel.holland at sifive.com> wrote:
>
> Hi Anup,
>
> On 2026-02-07 4:25 AM, Anup Patel wrote:
> > It is possible to have platform where an irqchip device targets
> > a subset of harts and there are multiple irqchip devices to cover
> > all harts.
> >
> > To support this scenario:
> > 1) Add target_harts hartmask to struct sbi_irqchip_device which
> >    represents the set of harts targetted by the irqchip device
> > 2) Call warm_init() and irq_handle() callbacks of an irqchip device
> >    on a hart only if irqchip device targets that particular hart
> >
> > Signed-off-by: Anup Patel <anup.patel at oss.qualcomm.com>
> > ---
> >  include/sbi/sbi_irqchip.h |  8 +++++--
> >  lib/sbi/sbi_irqchip.c     | 48 ++++++++++++++++++++++++++++-----------
> >  lib/utils/irqchip/aplic.c | 12 +++++++++-
> >  lib/utils/irqchip/imsic.c |  7 ++++--
> >  lib/utils/irqchip/plic.c  |  5 ++--
> >  5 files changed, 59 insertions(+), 21 deletions(-)
> >
> > diff --git a/include/sbi/sbi_irqchip.h b/include/sbi/sbi_irqchip.h
> > index cda1e50f..c3ded271 100644
> > --- a/include/sbi/sbi_irqchip.h
> > +++ b/include/sbi/sbi_irqchip.h
> > @@ -10,6 +10,7 @@
> >  #ifndef __SBI_IRQCHIP_H__
> >  #define __SBI_IRQCHIP_H__
> >
> > +#include <sbi/sbi_hartmask.h>
> >  #include <sbi/sbi_list.h>
> >  #include <sbi/sbi_types.h>
> >
> > @@ -20,11 +21,14 @@ struct sbi_irqchip_device {
> >       /** Node in the list of irqchip devices */
> >       struct sbi_dlist node;
> >
> > +     /** Set of harts targetted by this irqchip */
> > +     struct sbi_hartmask target_harts;
> > +
> >       /** Initialize per-hart state for the current hart */
> >       int (*warm_init)(struct sbi_irqchip_device *chip);
> >
> >       /** Process hardware interrupts from this irqchip */
> > -     int (*process_hwirqs)(void);
> > +     int (*process_hwirqs)(struct sbi_irqchip_device *chip);
> >  };
> >
> >  /**
> > @@ -38,7 +42,7 @@ struct sbi_irqchip_device {
> >  int sbi_irqchip_process(void);
> >
> >  /** Register an irqchip device to receive callbacks */
> > -void sbi_irqchip_add_device(struct sbi_irqchip_device *chip);
> > +int sbi_irqchip_add_device(struct sbi_irqchip_device *chip);
> >
> >  /** Initialize interrupt controllers */
> >  int sbi_irqchip_init(struct sbi_scratch *scratch, bool cold_boot);
> > diff --git a/lib/sbi/sbi_irqchip.c b/lib/sbi/sbi_irqchip.c
> > index 3b970527..77ec05af 100644
> > --- a/lib/sbi/sbi_irqchip.c
> > +++ b/lib/sbi/sbi_irqchip.c
> > @@ -13,24 +13,44 @@
> >
> >  static SBI_LIST_HEAD(irqchip_list);
> >
> > -static int default_irqfn(void)
> > +int sbi_irqchip_process(void)
> >  {
> > -     return SBI_ENODEV;
> > -}
> > +     struct sbi_irqchip_device *chip;
> > +     int rc = SBI_ENODEV;
> >
> > -static int (*ext_irqfn)(void) = default_irqfn;
> > +     sbi_list_for_each_entry(chip, &irqchip_list, node) {
> > +             if (!chip->process_hwirqs)
> > +                     continue;
> > +             if (!sbi_hartmask_test_hartindex(current_hartindex(), &chip->target_harts))
> > +                     continue;
> > +             rc = chip->process_hwirqs(chip);
> > +             if (rc)
> > +                     break;
>
> This is a hot path (used for IPIs already), so I would recommend using a
> per-hart pointer to the top-level chip that gets set in
> sbi_irqchip_add_device(), so there is no lookup needed here.

Good suggestion. I will update in the next revision.

>
> > +     }
> >
> > -int sbi_irqchip_process(void)
> > -{
> > -     return ext_irqfn();
> > +     return rc;
> >  }
> >
> > -void sbi_irqchip_add_device(struct sbi_irqchip_device *chip)
> > +int sbi_irqchip_add_device(struct sbi_irqchip_device *chip)
> >  {
> > -     sbi_list_add_tail(&chip->node, &irqchip_list);
> > +     struct sbi_irqchip_device *c;
> > +     struct sbi_hartmask hm;
> > +
> > +     if (!chip || !sbi_hartmask_weight(&chip->target_harts))
> > +             return SBI_EINVAL;
> > +
> > +     if (chip->process_hwirqs) {
> > +             sbi_list_for_each_entry(c, &irqchip_list, node) {
> > +                     if (!c->process_hwirqs)
> > +                             continue;
> > +                     sbi_hartmask_and(&hm, &c->target_harts, &chip->target_harts);
> > +                     if (sbi_hartmask_weight(&hm))
> > +                             return SBI_EINVAL;
> > +             }
> > +     }
> >
> > -     if (chip->process_hwirqs)
> > -             ext_irqfn = chip->process_hwirqs;
> > +     sbi_list_add_tail(&chip->node, &irqchip_list);
> > +     return 0;
> >  }
> >
> >  int sbi_irqchip_init(struct sbi_scratch *scratch, bool cold_boot)
> > @@ -48,12 +68,14 @@ int sbi_irqchip_init(struct sbi_scratch *scratch, bool cold_boot)
> >       sbi_list_for_each_entry(chip, &irqchip_list, node) {
> >               if (!chip->warm_init)
> >                       continue;
> > +             if (!sbi_hartmask_test_hartindex(current_hartindex(), &chip->target_harts))
> > +                     continue;
> >               rc = chip->warm_init(chip);
> >               if (rc)
> >                       return rc;
> >       }
> >
> > -     if (ext_irqfn != default_irqfn)
> > +     if (!sbi_list_empty(&irqchip_list))
> >               csr_set(CSR_MIE, MIP_MEIP);
>
> This should only enable interrupts if there is an irqchip targeting the current
> hart.

Yes, good catch. I will update in the next revision.

Regards,
Anup



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