[PATCH v4 0/2] Register Zicntr in FDT when emulating is possible

[Yao Zi]

OpenSBI is capable of emulating time CSR on HARTs without a full Zicntr
extension. Previously, we hardcoded Zicntr extension in the devicetree
for these cores, like JH7110 in mainline Linux[1]. This doesn't reflect
the hardware and may confuse pre-SBI bootloaders, like U-Boot running in
M-Mode.

To solve the issue, let's register Zicntr in FDT dynamically for cores
supporting it by SBI emulation, allowing pre-SBI stages to detect Zicntr
availability reliably with riscv,isa-extensions.

[1]: https://elixir.bootlin.com/linux/v6.14-rc3/source/arch/riscv/boot/dts/starfive/jh7110.dtsi#L61

Changed from v3
- Zicntr detection
  - Adjust sbi_timer.c to detect time CSR with SBI_HART_CSR_TIME instead
    of SBI_HART_CSR_ZICNTR. This change was wrongly dropped in v2.
- Link to v3: https://lore.kernel.org/all/20250503105715.16990-2-ziyao@disroot.org

Changed from v2
- Zicntr detection
  - Introduce SBI_HART_CSR_MAX
  - Make sbi_hart_features.csrs an array for flexibillity
- Link to v2: https://lore.kernel.org/all/20250418144758.2633-1-ziyao@disroot.org/

Changed from v1
- Zicntr detection
  - Introduce a bitmap to sbi_hart_features instead of using pseudo-
    extensions to represent availability of CSRs
  - Change possibly misleading abbreviation "RO" to "read-only" in
    commit message
- FDT fixup
  - Don't register zicntr to (legacy) devicetrees where harts don't come
    with a riscv,isa-extensions property
- Link to v1: https://lore.kernel.org/opensbi/20250225154103.5229-1-ziyao@disroot.org/

Yao Zi (2):
  lib: sbi: hart: Detect existence of cycle and instret CSRs for Zicntr
  lib: utils: fdt: Claim Zicntr if time CSR emulation is possible

 include/sbi/sbi_hart.h    | 10 ++++++++++
 lib/sbi/sbi_hart.c        | 35 ++++++++++++++++++++++++++++-------
 lib/sbi/sbi_timer.c       |  2 +-
 lib/utils/fdt/fdt_fixup.c | 33 ++++++++++++++++++++++++++++++++-
 4 files changed, 71 insertions(+), 9 deletions(-)

-- 
2.49.0