[PATCH 1/2] lib: sbi_pmu: ensure update hpm counter before starting counting

[Guo Ren]

Hi Junqiang,

Could you help test this patch series on unmatched?

On Sat, Aug 12, 2023 at 1:06 PM Inochi Amaoto <inochiama at outlook.com> wrote:
>
> From: "haijiao.liu at sophgo.com" <haijiao.liu at sophgo.com>
>
> When detecting features of PMU, the hpm counter may be written to some
> value, this will cause some unexpected behavior in some cases. So ensure
> the hpm counter is updated before starting the counter.
>
> Signed-off-by: haijiao.liu at sophgo.com <haijiao.liu at sophgo.com>
> ---
>  lib/sbi/sbi_pmu.c | 11 +++++++----
>  1 file changed, 7 insertions(+), 4 deletions(-)
>
> diff --git a/lib/sbi/sbi_pmu.c b/lib/sbi/sbi_pmu.c
> index adb9f18..f5507f2 100644
> --- a/lib/sbi/sbi_pmu.c
> +++ b/lib/sbi/sbi_pmu.c
> @@ -353,8 +353,11 @@ static int pmu_ctr_start_hw(uint32_t cidx, uint64_t ival, bool ival_update)
>         if (cidx >= num_hw_ctrs || cidx == 1)
>                 return SBI_EINVAL;
>
> -       if (sbi_hart_priv_version(scratch) < SBI_HART_PRIV_VER_1_11)
> -               goto skip_inhibit_update;
> +       if (sbi_hart_priv_version(scratch) < SBI_HART_PRIV_VER_1_11) {
> +               if (ival_update)
> +                       pmu_ctr_write_hw(cidx, ival);
> +               return 0;
> +       }
>
>         /*
>          * Some of the hardware may not support mcountinhibit but perf stat
> @@ -370,12 +373,12 @@ static int pmu_ctr_start_hw(uint32_t cidx, uint64_t ival, bool ival_update)
>                 pmu_ctr_enable_irq_hw(cidx);
>         if (pmu_dev && pmu_dev->hw_counter_enable_irq)
>                 pmu_dev->hw_counter_enable_irq(cidx);
> -       csr_write(CSR_MCOUNTINHIBIT, mctr_inhbt);
>
> -skip_inhibit_update:
>         if (ival_update)
>                 pmu_ctr_write_hw(cidx, ival);
>
> +       csr_write(CSR_MCOUNTINHIBIT, mctr_inhbt);
> +
>         return 0;
>  }
>
> --
> 2.34.1
>


-- 
Best Regards
 Guo Ren