[PATCH v5 09/12] lib: sbi: Counter info width should be zero indexed

Anup Patel anup at brainfault.org
Thu Nov 11 04:47:49 PST 2021


On Tue, Nov 9, 2021 at 12:23 AM Atish Patra <atish.patra at wdc.com> wrote:
>
> The mhpm bits represent the number of bits available in mhpmcounter
> while counter width describes a zero indexed value. Fix the counter width
> calculation.
>
> Fixes: 13d40f21d588 ("lib: sbi: Add PMU support")
>
> Reviewed-by: Bin Meng <bmeng.cn at gmail.com>
> Reviewed-by: Anup Patel <anup.patel at wdc.com>
> Signed-off-by: Atish Patra <atish.patra at wdc.com>

Applied this patch to the riscv/opensbi repo.

Thanks,
Anup

> ---
>  lib/sbi/sbi_pmu.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/lib/sbi/sbi_pmu.c b/lib/sbi/sbi_pmu.c
> index 1bb3e49412b7..da8a37b1d34b 100644
> --- a/lib/sbi/sbi_pmu.c
> +++ b/lib/sbi/sbi_pmu.c
> @@ -649,7 +649,7 @@ int sbi_pmu_ctr_get_info(uint32_t cidx, unsigned long *ctr_info)
>                 if (cidx == 0 || cidx == 2)
>                         cinfo.width = 63;
>                 else
> -                       cinfo.width = sbi_hart_mhpm_bits(scratch);
> +                       cinfo.width = sbi_hart_mhpm_bits(scratch) - 1;
>         } else {
>                 /* it's a firmware counter */
>                 cinfo.type = SBI_PMU_CTR_TYPE_FW;
> --
> 2.31.1
>
>
> --
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