Functional testing of mainline vchiq driver

[Phil Elwell]

On 26/10/2016 12:01, Stefan Wahren wrote:
>
> Am 26.10.2016 um 10:19 schrieb Phil Elwell:
>> On 26/10/2016 09:07, Stefan Wahren wrote:
>>> Am 26.10.2016 um 09:50 schrieb Phil Elwell:
>>>> On 26/10/2016 00:22, Michael Zoran wrote:
>>>>> OK, I was able to boot a stock upstream kernel on a RPI-2.
>>>>> The issue is the __overrides__ is needed.
>>>> You don't need the override/parameter provided the value of the
>>>> cache-line-size property is correct - 32 on BCM2835, 64 on BCM2836 and
>>>> BCM2837.
>>> Thanks for the clarification. I don't believe that the __overrides__
>>> fix the problem for me, because i have a Raspberry Pi B so the 32
>>> should be correct.
>>> Could you please explain which cache line size this property should
>>> describe (VPU, ARM, L1, L2, ...)?
>> It describes the granularity of the ARM's cache flushing and
>> invalidation as seen by the VPU, i.e. the ARM L2 cache line size.
>>
>
> I think of using coherency_line_size from struct cacheinfo instead.
> But i'm not sure this is the same.

>From the header:

  * @coherency_line_size: size of each cache line usually representing
  *      the minimum amount of data that gets transferred from memory

That seems to be the number we need.