[PATCH] ARM: PL011: add support for extended FIFO-size of PL011-r1p5
Stephen Warren
swarren at wwwdotorg.org
Mon May 20 22:12:58 EDT 2013
On 05/20/2013 07:39 PM, Jongsung Kim wrote:
> Jongsung Kim <neidhard.kim at lge.com> :
>> Stephen Warren <swarren at wwwdotorg.org> :
>>>> All r1p5 have 32-byte FIFO depth and it's not configurable. From the
>>>> PL011
>>>> TRM:
>>>>
>>>> r1p4-r1p5 Contains the following differences in functionality:
>>>> * The receive and transmit FIFOs are increased to a depth of
> 32.
>>>> * The Revision field in the UARTPeriphID2 Register on page
> 3-24
>>>> bits [7:4] now reads back as 0x3.
>>>
>>> Well, that certainly isn't true in practice. I think we should revert
>>> this commit until we can determine what the problem is.
>>
>> I asked to the ARM support about this. Waiting for reply..
>
> ARM support said they doesn't have information about BCM2835 UART. Does
> anyone have a communication channel to Broadcom? It takes time for me to
> get contact point to Broadcom.. (I'm trying)
>
> However, ARM support also said:
>
> "If the Broadcom part definitely has 16-deep FIFOs, it cannot be based
> on a PL011 r1p5, so I might guess that Broadcom have just referenced
> the latest version of the documentation on our website, but have actually
> implemented an earlier version."
This all seems rather academic. Irrespective of what the cause of the
problem is, the commit actively breaks a previously working
configuration. I still believe we should revert it first, then find out
exactly what's going on later. Should I sent the revert commit?
More information about the linux-rpi-kernel
mailing list