[PATCH] ARM: PL011: add support for extended FIFO-size of PL011-r1p5

[Russell King - ARM Linux]

On Tue, May 14, 2013 at 10:59:58PM -0600, Stephen Warren wrote:
> Well, that certainly isn't true in practice. I think we should revert
> this commit until we can determine what the problem is.
> 
> I validated that the periphid register in HW contains the r1p5 revision
> (3), and the pcellid register does indeed contain the expected
> 0xb105f00d value. However, if I run the following hacky code in U-Boot
> to determine the FIFO depth, it comes out as 16, which explains the
> symptoms I'm seeing:

We could do that, just like we do in 8250.c to check the FIFO depth.
There's not much harm in doing that at boot time, it just needs to be
done carefully so that it doesn't disrupt any existing use of the UART.