[PATCH v6 09/10] PCI: dw-rockchip: Add system PM support

Igor Velkov iav at iav.lv
Wed Oct 14 20:56:12 PDT 2026


Tested on ODROID-M1 (RK3568, NVMe on pcie3x2) with 7.3-rc7 and Jonas'
EHCI/OHCI clock patch: s2idle 4/4, deep 6/6, the NVMe stays usable
after resume. Without this series it is lost on resume:

  nvme 0002:21:00.0: Unable to change power state from D3cold to D0, device inaccessible

Tested-by: Igor Velkov <iav at iav.lv>

> +	ret = dw_pcie_suspend_noirq(pci);
> +	if (ret)
> +		return ret;
> +
> +	gpiod_set_value_cansleep(rockchip->rst_gpio, 0);
> +	rockchip_pcie_phy_deinit(rockchip);

When pci_host_common_d3cold_possible() returns false,
dw_pcie_suspend_noirq() returns 0 without setting pci->suspended. The
controller is then powered down here anyway, and dw_pcie_resume_noirq()
returns early on !pci->suspended, so the RC is not set up again and the
link is not restarted. I did not hit this path on M1.



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