[PATCH v2] arm64: dts: rockchip: rock-3b: Model PI6C20100 as gated-fixed-clock

[MidG971]

On 2026/03/04, Shawn Lin wrote:
> IIUC, you are using Claude to help generate this patch, please
> describe it properly, for example,
>
> Co-developed-by: Claude claude-opus-4-20250514 [1]
> or
> Assisted-by: Claude:claude-3-opus [2]
>
> [1] https://lwn.net/Articles/1031473/
> [2] https://docs.kernel.org/process/coding-assistants.html

Thank you for the guidance. I used Claude as a coding assistant and
will use the proper tag in v3:

  Assisted-by: Claude:claude-3-opus
  Signed-off-by: MidG971 <midgy971 at gmail.com>

> There is a missing pipe clock which should be fixed. Please
> refer to David's patch[3].
>
> [3] https://lore.kernel.org/linux-rockchip/d981fa84-bd05-ac9d-98ca-89ee47177829@rock-chips.com/T/#m6a8289609e6a60691d3c06358b6322c7aa5e43d1

Since our board-level &pcie3x2 override replaces the clocks property
entirely, v3 adds CLK_PCIE30X2_PIPE_DFT ("pipe") as well, consistent
with David's base DTS patch.

I tested v3 on the ROCK 3B (kernel 6.19.0-rc5): pcie3x2 probes
successfully and the NVMe device is detected at 15.75 Gb/s. The
pcie30_refclk clock appears in the clock tree at 100MHz with pcie3x2
as its consumer.

One note on the pipe clock test: CLK_PCIE30X2_PIPE_DFT is defined in
rk3568-cru.h but was not yet registered in the CRU driver in the
tested kernel build, so the pipe clock was excluded from the
functional test (pcie3x2 probe fails with -ENOENT at clock index 5
when it is included). The gated-fixed-clock node and ref clock were
verified working. I expect the pipe clock will work once the CRU
driver registers it alongside David's DTS patch.

v3 is sent separately.

Best regards,
MidG971