[PATCH 2/2] arm64: dts: rockchip: Add SPDIF nodes to RK3576 device tree

[Sebastian Reichel]

Add support for all six SPDIF transmitters found in the RK3576.
The nodes have been taken over from the BSP kernel and checked
against the TRM (power domain descriptions from chapter 6.3.2,
addresses from "Table 1-1 Address Mapping", interrupt from
"Table 1-3 RK3576 Interrupt Connection List" (TRM numbers are
off by 32 due to SGI/PPI not being numbered separately). The
TRM lacks a proper clock tree, but fortunately are quite obvious
for the SPDIF IP.

Note, that the RK3576 also has 3 SPDIF receivers, which need their
own binding and are not handled in this patch.

A typical use case for the SPDIF transmitters is audio support for
the Displayport (DP) controller. DP requires inserting PCUV control
bits, which requires software support when using I2S. The SPDIF IP
can add it automatically and thus is preferred.

Signed-off-by: Sebastian Reichel <sebastian.reichel at collabora.com>
---
 arch/arm64/boot/dts/rockchip/rk3576.dtsi | 82 ++++++++++++++++++++++++++++++++
 1 file changed, 82 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3576.dtsi b/arch/arm64/boot/dts/rockchip/rk3576.dtsi
index 53ff6bd027af..b03dd69eca3c 100644
--- a/arch/arm64/boot/dts/rockchip/rk3576.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3576.dtsi
@@ -1379,6 +1379,19 @@ vop_mmu: iommu at 27d07e00 {
 			status = "disabled";
 		};
 
+		spdif_tx2: spdif-tx at 27d20000 {
+			compatible = "rockchip,rk3576-spdif", "rockchip,rk3568-spdif";
+			reg = <0x0 0x27d20000 0x0 0x1000>;
+			interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cru MCLK_SPDIF_TX2>, <&cru HCLK_SPDIF_TX2>;
+			clock-names = "mclk", "hclk";
+			dmas = <&dmac2 28>;
+			dma-names = "tx";
+			power-domains = <&power RK3576_PD_VO0>;
+			#sound-dai-cells = <0>;
+			status = "disabled";
+		};
+
 		sai5: sai at 27d40000 {
 			compatible = "rockchip,rk3576-sai";
 			reg = <0x0 0x27d40000 0x0 0x1000>;
@@ -1511,6 +1524,45 @@ dp0_out: port at 1 {
 			};
 		};
 
+		spdif_tx3: spdif-tx at 27ea0000 {
+			compatible = "rockchip,rk3576-spdif", "rockchip,rk3568-spdif";
+			reg = <0x0 0x27ea0000 0x0 0x1000>;
+			interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cru MCLK_SPDIF_TX3>, <&cru HCLK_SPDIF_TX3>;
+			clock-names = "mclk", "hclk";
+			dmas = <&dmac2 29>;
+			dma-names = "tx";
+			power-domains = <&power RK3576_PD_VO1>;
+			#sound-dai-cells = <0>;
+			status = "disabled";
+		};
+
+		spdif_tx4: spdif-tx at 27eb0000 {
+			compatible = "rockchip,rk3576-spdif", "rockchip,rk3568-spdif";
+			reg = <0x0 0x27eb0000 0x0 0x1000>;
+			interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cru MCLK_SPDIF_TX4>, <&cru HCLK_SPDIF_TX4>;
+			clock-names = "mclk", "hclk";
+			dmas = <&dmac1 6>;
+			dma-names = "tx";
+			power-domains = <&power RK3576_PD_VO1>;
+			#sound-dai-cells = <0>;
+			status = "disabled";
+		};
+
+		spdif_tx5: spdif-tx at 27ec0000 {
+			compatible = "rockchip,rk3576-spdif", "rockchip,rk3568-spdif";
+			reg = <0x0 0x27ec0000 0x0 0x1000>;
+			interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cru MCLK_SPDIF_TX5>, <&cru HCLK_SPDIF_TX5>;
+			clock-names = "mclk", "hclk";
+			dmas = <&dmac0 25>;
+			dma-names = "tx";
+			power-domains = <&power RK3576_PD_VO1>;
+			#sound-dai-cells = <0>;
+			status = "disabled";
+		};
+
 		sai7: sai at 27ed0000 {
 			compatible = "rockchip,rk3576-sai";
 			reg = <0x0 0x27ed0000 0x0 0x1000>;
@@ -2166,6 +2218,36 @@ &sai4m0_sdi
 			status = "disabled";
 		};
 
+		spdif_tx0: spdif-tx at 2a670000 {
+			compatible = "rockchip,rk3576-spdif", "rockchip,rk3568-spdif";
+			reg = <0x0 0x2a670000 0x0 0x1000>;
+			interrupts = <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cru MCLK_SPDIF_TX0>, <&cru HCLK_SPDIF_TX0>;
+			clock-names = "mclk", "hclk";
+			dmas = <&dmac0 5>;
+			dma-names = "tx";
+			power-domains = <&power RK3576_PD_AUDIO>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&spdifm0_tx0>;
+			#sound-dai-cells = <0>;
+			status = "disabled";
+		};
+
+		spdif_tx1: spdif-tx at 2a680000 {
+			compatible = "rockchip,rk3576-spdif", "rockchip,rk3568-spdif";
+			reg = <0x0 0x2a680000 0x0 0x1000>;
+			interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cru MCLK_SPDIF_TX1>, <&cru HCLK_SPDIF_TX1>;
+			clock-names = "mclk", "hclk";
+			dmas = <&dmac1 5>;
+			dma-names = "tx";
+			power-domains = <&power RK3576_PD_AUDIO>;
+			pinctrl-names = "default";
+			pinctrl-0 = <&spdifm0_tx1>;
+			#sound-dai-cells = <0>;
+			status = "disabled";
+		};
+
 		gic: interrupt-controller at 2a701000 {
 			compatible = "arm,gic-400";
 			reg = <0x0 0x2a701000 0 0x10000>,

-- 
2.51.0