[RFC PATCH v4 9/9] pmdomain: rockchip: Add a regulator to the RK3568 NPU power domain

[Heiko Stübner]

Hi Ulf,

Am Mittwoch, 8. Juli 2026, 17:24:04 Mitteleuropäische Sommerzeit schrieb Ulf Hansson:
> On Sat, Jun 13, 2026 at 9:01 AM MidG971 <midgy971 at gmail.com> wrote:
> >
> > From: Midgy BALON <midgy971 at gmail.com>
> >
> > The RK3568 NPU rail (vdd_npu) needs to be enabled before the domain is
> > powered on and disabled after it is powered off. Give DOMAIN_RK3568 a
> > regulator parameter (like DOMAIN_RK3588 already has) so the NPU domain
> > can set need_regulator, letting genpd manage the rail wired up as the
> > domain's domain-supply instead of marking it always-on in DT.
> >
> > Suggested-by: Chaoyi Chen <chaoyi.chen at rock-chips.com>
> > Signed-off-by: Midgy BALON <midgy971 at gmail.com>
> 
> This looks good to me. I assume this can be picked up independently of
> the other patches, whenever you decide to move forward from the RFC.
> If not, please let me know.

Correct, this could be applied any time.

> 
> Kind regards
> Uffe
> 
> > ---
> >  drivers/pmdomain/rockchip/pm-domains.c | 36 ++++++++++++++++++--------
> >  1 file changed, 25 insertions(+), 11 deletions(-)
> >
> > diff --git a/drivers/pmdomain/rockchip/pm-domains.c b/drivers/pmdomain/rockchip/pm-domains.c
> > index 490bbb1d1d8e8..19db307e3811d 100644
> > --- a/drivers/pmdomain/rockchip/pm-domains.c
> > +++ b/drivers/pmdomain/rockchip/pm-domains.c
> > @@ -138,6 +138,20 @@ struct rockchip_pmu {
> >         .active_wakeup = wakeup,                        \
> >  }
> >
> > +#define DOMAIN_M_R(_name, pwr, status, req, idle, ack, wakeup, regulator)      \
> > +{                                                      \
> > +       .name = _name,                          \
> > +       .pwr_w_mask = (pwr) << 16,                      \
> > +       .pwr_mask = (pwr),                              \
> > +       .status_mask = (status),                        \
> > +       .req_w_mask = (req) << 16,                      \
> > +       .req_mask = (req),                              \
> > +       .idle_mask = (idle),                            \
> > +       .ack_mask = (ack),                              \
> > +       .active_wakeup = wakeup,                        \
> > +       .need_regulator = regulator,                    \
> > +}

but Midgy please do some alphabetical sorting ... in my book 
    DOMAIN_M_R
should be _below_
    DOMAIN_M_G

> > +
> >  #define DOMAIN_M_G(_name, pwr, status, req, idle, ack, g_mask, wakeup, keepon) \


Heiko


> >  {                                                      \
> >         .name = _name,                                  \
> > @@ -241,8 +255,8 @@ struct rockchip_pmu {
> >  #define DOMAIN_RK3562(name, pwr, req, g_mask, mem, wakeup)             \
> >         DOMAIN_M_G_SD(name, pwr, pwr, req, req, req, g_mask, mem, wakeup, false)
> >
> > -#define DOMAIN_RK3568(name, pwr, req, wakeup)          \
> > -       DOMAIN_M(name, pwr, pwr, req, req, req, wakeup)
> > +#define DOMAIN_RK3568(name, pwr, req, wakeup, regulator)               \
> > +       DOMAIN_M_R(name, pwr, pwr, req, req, req, wakeup, regulator)
> >
> >  #define DOMAIN_RK3576(name, p_offset, pwr, status, r_status, r_offset, req, idle, g_mask, wakeup)      \
> >         DOMAIN_M_O_R_G(name, p_offset, pwr, status, 0, r_status, r_status, r_offset, req, idle, idle, g_mask, wakeup)
> > @@ -1274,15 +1288,15 @@ static const struct rockchip_domain_info rk3562_pm_domains[] = {
> >  };
> >
> >  static const struct rockchip_domain_info rk3568_pm_domains[] = {
> > -       [RK3568_PD_NPU]         = DOMAIN_RK3568("npu",  BIT(1), BIT(2),  false),
> > -       [RK3568_PD_GPU]         = DOMAIN_RK3568("gpu",  BIT(0), BIT(1),  false),
> > -       [RK3568_PD_VI]          = DOMAIN_RK3568("vi",   BIT(6), BIT(3),  false),
> > -       [RK3568_PD_VO]          = DOMAIN_RK3568("vo",   BIT(7), BIT(4),  false),
> > -       [RK3568_PD_RGA]         = DOMAIN_RK3568("rga",  BIT(5), BIT(5),  false),
> > -       [RK3568_PD_VPU]         = DOMAIN_RK3568("vpu",  BIT(2), BIT(6),  false),
> > -       [RK3568_PD_RKVDEC]      = DOMAIN_RK3568("vdec", BIT(4), BIT(8),  false),
> > -       [RK3568_PD_RKVENC]      = DOMAIN_RK3568("venc", BIT(3), BIT(7),  false),
> > -       [RK3568_PD_PIPE]        = DOMAIN_RK3568("pipe", BIT(8), BIT(11), false),
> > +       [RK3568_PD_NPU]         = DOMAIN_RK3568("npu",  BIT(1), BIT(2),  false, true),
> > +       [RK3568_PD_GPU]         = DOMAIN_RK3568("gpu",  BIT(0), BIT(1),  false, false),
> > +       [RK3568_PD_VI]          = DOMAIN_RK3568("vi",   BIT(6), BIT(3),  false, false),
> > +       [RK3568_PD_VO]          = DOMAIN_RK3568("vo",   BIT(7), BIT(4),  false, false),
> > +       [RK3568_PD_RGA]         = DOMAIN_RK3568("rga",  BIT(5), BIT(5),  false, false),
> > +       [RK3568_PD_VPU]         = DOMAIN_RK3568("vpu",  BIT(2), BIT(6),  false, false),
> > +       [RK3568_PD_RKVDEC]      = DOMAIN_RK3568("vdec", BIT(4), BIT(8),  false, false),
> > +       [RK3568_PD_RKVENC]      = DOMAIN_RK3568("venc", BIT(3), BIT(7),  false, false),
> > +       [RK3568_PD_PIPE]        = DOMAIN_RK3568("pipe", BIT(8), BIT(11), false, false),
> >  };
> >
> >  static const struct rockchip_domain_info rk3576_pm_domains[] = {
> > --
> > 2.39.5
> >
> >
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