[PATCH v3 3/3] PCI: dw-rockchip: Add pcie_ltssm_state_transition trace support
Shawn Lin
shawn.lin at rock-chips.com
Sun Jan 11 23:19:36 PST 2026
在 2026/01/12 星期一 14:42, kernel test robot 写道:
> Hi Shawn,
>
> kernel test robot noticed the following build errors:
>
> [auto build test ERROR on pci/next]
> [also build test ERROR on next-20260109]
> [cannot apply to pci/for-linus trace/for-next mani-mhi/mhi-next linus/master v6.19-rc5]
> [If your patch is applied to the wrong git tree, kindly drop us a note.
> And when submitting patch, we suggest to use '--base' as documented in
> https://git-scm.com/docs/git-format-patch#_base_tree_information]
>
> url: https://github.com/intel-lab-lkp/linux/commits/Shawn-Lin/PCI-trace-Add-PCI-controller-LTSSM-transition-tracepoint/20260112-100141
> base: https://git.kernel.org/pub/scm/linux/kernel/git/pci/pci.git next
> patch link: https://lore.kernel.org/r/1768180800-63364-4-git-send-email-shawn.lin%40rock-chips.com
> patch subject: [PATCH v3 3/3] PCI: dw-rockchip: Add pcie_ltssm_state_transition trace support
> config: loongarch-randconfig-002-20260112 (https://download.01.org/0day-ci/archive/20260112/202601121428.WVvakywZ-lkp@intel.com/config)
> compiler: loongarch64-linux-gcc (GCC) 15.2.0
> reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20260112/202601121428.WVvakywZ-lkp@intel.com/reproduce)
>
> If you fix the issue in a separate patch/commit (i.e. not just a new version of
> the same patch/commit), kindly add following tags
> | Reported-by: kernel test robot <lkp at intel.com>
> | Closes: https://lore.kernel.org/oe-kbuild-all/202601121428.WVvakywZ-lkp@intel.com/
>
> All errors (new ones prefixed by >>):
>
> drivers/pci/controller/dwc/pcie-dw-rockchip.c: In function 'rockchip_pcie_ltssm_trace_work':
>>> drivers/pci/controller/dwc/pcie-dw-rockchip.c:264:41: error: implicit declaration of function 'dw_pcie_ltssm_status_string' [-Wimplicit-function-declaration]
> 264 | dw_pcie_ltssm_status_string(state),
Hi lkp,
It depends on another patch mentioned in the cover letter. So the
complie error is expected right now.
> | ^~~~~~~~~~~~~~~~~~~~~~~~~~~
>>> drivers/pci/controller/dwc/pcie-dw-rockchip.c:264:41: error: passing argument 2 of 'trace_pcie_ltssm_state_transition' makes pointer from integer without a cast [-Wint-conversion]
> 264 | dw_pcie_ltssm_status_string(state),
> | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
> | |
> | int
> In file included from include/trace/events/pci_controller.h:9,
> from drivers/pci/controller/dwc/pcie-dw-rockchip.c:26:
> include/trace/events/pci_controller.h:20:52: note: expected 'const char *' but argument is of type 'int'
> 20 | TP_PROTO(const char *dev_name, const char *state, u32 rate),
> | ~~~~~~~~~~~~^~~~~
> include/linux/tracepoint.h:288:41: note: in definition of macro '__DECLARE_TRACE'
> 288 | static inline void trace_##name(proto) \
> | ^~~~~
> include/linux/tracepoint.h:494:31: note: in expansion of macro 'PARAMS'
> 494 | __DECLARE_TRACE(name, PARAMS(proto), PARAMS(args), \
> | ^~~~~~
> include/linux/tracepoint.h:632:9: note: in expansion of macro 'DECLARE_TRACE_EVENT'
> 632 | DECLARE_TRACE_EVENT(name, PARAMS(proto), PARAMS(args))
> | ^~~~~~~~~~~~~~~~~~~
> include/linux/tracepoint.h:632:35: note: in expansion of macro 'PARAMS'
> 632 | DECLARE_TRACE_EVENT(name, PARAMS(proto), PARAMS(args))
> | ^~~~~~
> include/trace/events/pci_controller.h:19:1: note: in expansion of macro 'TRACE_EVENT'
> 19 | TRACE_EVENT(pcie_ltssm_state_transition,
> | ^~~~~~~~~~~
> include/trace/events/pci_controller.h:20:9: note: in expansion of macro 'TP_PROTO'
> 20 | TP_PROTO(const char *dev_name, const char *state, u32 rate),
> | ^~~~~~~~
>
>
> vim +/dw_pcie_ltssm_status_string +264 drivers/pci/controller/dwc/pcie-dw-rockchip.c
>
> 225
> 226 #ifdef CONFIG_TRACING
> 227 static void rockchip_pcie_ltssm_trace_work(struct work_struct *work)
> 228 {
> 229 struct rockchip_pcie *rockchip = container_of(work, struct rockchip_pcie,
> 230 trace_work.work);
> 231 struct dw_pcie *pci = &rockchip->pci;
> 232 enum dw_pcie_ltssm state;
> 233 u32 i, l1ss, prev_val = DW_PCIE_LTSSM_UNKNOWN, rate, val;
> 234
> 235 for (i = 0; i < PCIE_DBG_LTSSM_HISTORY_CNT; i++) {
> 236 val = rockchip_pcie_readl_apb(rockchip, PCIE_CLIENT_DBG_FIFO_STATUS);
> 237 rate = FIELD_GET(PCIE_DBG_FIFO_RATE_MASK, val);
> 238 l1ss = FIELD_GET(PCIE_DBG_FIFO_L1SUB_MASK, val);
> 239 val = FIELD_GET(PCIE_LTSSM_STATUS_MASK, val);
> 240
> 241 /*
> 242 * Hardware Mechanism: The ring FIFO employs two tracking counters:
> 243 * - 'last-read-point': maintains the user's last read position
> 244 * - 'last-valid-point': tracks the hardware's last state update
> 245 *
> 246 * Software Handling: When two consecutive LTSSM states are identical,
> 247 * it indicates invalid subsequent data in the FIFO. In this case, we
> 248 * skip the remaining entries. The dual-counter design ensures that on
> 249 * the next state transition, reading can resume from the last user
> 250 * position.
> 251 */
> 252 if ((i > 0 && val == prev_val) || val > DW_PCIE_LTSSM_RCVRY_EQ3)
> 253 break;
> 254
> 255 state = prev_val = val;
> 256 if (val == DW_PCIE_LTSSM_L1_IDLE) {
> 257 if (l1ss == 2)
> 258 state = DW_PCIE_LTSSM_L1_2;
> 259 else if (l1ss == 1)
> 260 state = DW_PCIE_LTSSM_L1_1;
> 261 }
> 262
> 263 trace_pcie_ltssm_state_transition(dev_name(pci->dev),
> > 264 dw_pcie_ltssm_status_string(state),
> 265 ((rate + 1) > pci->max_link_speed) ?
> 266 PCI_SPEED_UNKNOWN : PCIE_SPEED_2_5GT + rate);
> 267 }
> 268
> 269 schedule_delayed_work(&rockchip->trace_work, msecs_to_jiffies(5000));
> 270 }
> 271
>
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