Re: [PATCH v3 2/2] PCI: rockchip-host: comment danger of 5.0 GT/s speed

[Dragan Simic]

On Thursday, February 26, 2026 06:06 CET, Geraldo Nascimento <geraldogabriel at gmail.com> wrote:
> On Thu, Feb 26, 2026 at 05:52:58AM +0100, Dragan Simic wrote:
> > I agree about removing the effectively unused code block that handles
> > the "link_gen == 2" case from pcie-rockchip-host.c, but then please
> > remove the PCIE_CLIENT_GEN_SEL_2 define from pcie-rockchip.h and its
> > single "link_gen == 2" use from pcie-rockchip.c as well.
> 
> Good.
> 
> There's also some code that needs to be dropped from the endpoint
> driver.

Oh indeed, there's a redundant code block that handles a "link_gen == 2"
case in function rockchip_pcie_ep_link_training().  As a note, a similar
early check against "link_gen == 2" should be added there as well.

> > As part of that additional removal, an early check for "link_gen == 1"
> > should be added to function rockchip_pcie_init_port() in pcie-rockchip.c,
> > because that will become the only "link_gen" value it supports.
> 
> What do you think, should the driver bail out completely if
> link_gen != 1 or just let it force 2.5 GT/s speed with a warning?
> 
> I tend to go with the latter.

Actually, I'd go with the first option, i.e. bailing out early in function
rockchip_pcie_host_init_port() with an error message emitted, because that
function isn't supposed to define the link parameters.  Thus, if it ends up
receiving wrong link parameters, the issue lies somewhere else and should
be fixed at its origin.