[PATCH 1/2] arm64: dts: rockchip: add node name for RK3588_PD_RKVDEC0/1 and RK3588_PD_VENC0/1
Chaoyi Chen
kernel at airkyi.com
Mon Feb 23 17:42:02 PST 2026
On 2/13/2026 7:11 PM, Shawn Lin wrote:
> Hi Chaoyi
>
> 在 2026/02/13 星期五 18:32, Chaoyi Chen 写道:
>> Hello Shawn,
>>
>> On 2/13/2026 10:35 AM, Shawn Lin wrote:
>>> Thus the board dts files could add property for these nodes.
>>>
>>> Signed-off-by: Shawn Lin <shawn.lin at rock-chips.com>
>>> ---
>> You should also add pmdomain driver.
>>
>> I've encountered a similar issue before.
>> Finley told me to use the new PMIC, and that would solve the problem.
>> Maybe you're using the same old PMIC as I did :)
>>
>
> I don't know what does new PMIC mean? New RK806 driver or new RK806
> hardware?
It is new RK806 hardware. According to Finley, end users are currently using
this new type of PMIC.
>
> The problem is these power domains rely on voltage supply which could
> be probed late after pmdomain driver, then the system enables the PD and
> access the IP without PD actually enabled(even w/o voltage supply
> enabled).
>
If I'm not mistaken, the new hardware will automatically powers up the supply
corresponding to VDEC/VNEC.
>
>
>>
>>>
>>> arch/arm64/boot/dts/rockchip/rk3588-base.dtsi | 8 ++++----
>>> 1 file changed, 4 insertions(+), 4 deletions(-)
>>>
>>> diff --git a/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi
>>> index 7fe9593..4fb8888 100644
>>> --- a/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi
>>> +++ b/arch/arm64/boot/dts/rockchip/rk3588-base.dtsi
>>> @@ -907,7 +907,7 @@
>>> #size-cells = <0>;
>>> #power-domain-cells = <0>;
>>> - power-domain at RK3588_PD_RKVDEC0 {
>>> + pd_rkvdec0: power-domain at RK3588_PD_RKVDEC0 {
>>> reg = <RK3588_PD_RKVDEC0>;
>>> clocks = <&cru HCLK_RKVDEC0>,
>>> <&cru HCLK_VDPU_ROOT>,
>>> @@ -917,7 +917,7 @@
>>> pm_qos = <&qos_rkvdec0>;
>>> #power-domain-cells = <0>;
>>> };
>>> - power-domain at RK3588_PD_RKVDEC1 {
>>> + pd_rkvdec1: power-domain at RK3588_PD_RKVDEC1 {
>>> reg = <RK3588_PD_RKVDEC1>;
>>> clocks = <&cru HCLK_RKVDEC1>,
>>> <&cru HCLK_VDPU_ROOT>,
>>> @@ -926,7 +926,7 @@
>>> pm_qos = <&qos_rkvdec1>;
>>> #power-domain-cells = <0>;
>>> };
>>> - power-domain at RK3588_PD_VENC0 {
>>> + pd_venc0: power-domain at RK3588_PD_VENC0 {
>>> reg = <RK3588_PD_VENC0>;
>>> clocks = <&cru HCLK_RKVENC0>,
>>> <&cru ACLK_RKVENC0>;
>>> @@ -937,7 +937,7 @@
>>> #size-cells = <0>;
>>> #power-domain-cells = <0>;
>>> - power-domain at RK3588_PD_VENC1 {
>>> + pd_venc1: power-domain at RK3588_PD_VENC1 {
>>> reg = <RK3588_PD_VENC1>;
>>> clocks = <&cru HCLK_RKVENC1>,
>>> <&cru HCLK_RKVENC0>,
>>
>
>
>
--
Best,
Chaoyi
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