[PATCH v7 1/9] PCI: endpoint: Describe reserved subregions within BARs
Koichiro Den
den at valinux.co.jp
Sun Feb 15 08:38:39 PST 2026
Some endpoint controllers expose platform-owned, fixed register windows
within a BAR that EPF drivers must not reprogram (e.g. a BAR marked
BAR_RESERVED). Even in that case, EPF drivers may need to reference a
well-defined subset of that BAR, e.g. to reuse an integrated DMA
controller MMIO window as a doorbell target.
Introduce struct pci_epc_bar_rsvd_region and extend struct
pci_epc_bar_desc so EPC drivers can advertise such fixed subregions in a
controller-agnostic way.
No functional change for existing users.
Signed-off-by: Koichiro Den <den at valinux.co.jp>
---
include/linux/pci-epc.h | 28 ++++++++++++++++++++++++++++
1 file changed, 28 insertions(+)
diff --git a/include/linux/pci-epc.h b/include/linux/pci-epc.h
index c021c7af175f..7a87f5962dd0 100644
--- a/include/linux/pci-epc.h
+++ b/include/linux/pci-epc.h
@@ -200,6 +200,30 @@ enum pci_epc_bar_type {
BAR_RESERVED,
};
+/**
+ * enum pci_epc_bar_rsvd_region_type - type of a fixed subregion behind a BAR
+ * @PCI_EPC_BAR_RSVD_DMA_CTRL_MMIO: Integrated DMA controller MMIO window
+ *
+ * BARs marked BAR_RESERVED are owned by the SoC/EPC hardware and must not be
+ * reprogrammed by EPF drivers. Some of them still expose fixed subregions that
+ * EPFs may want to reference (e.g. embedded doorbell fallback).
+ */
+enum pci_epc_bar_rsvd_region_type {
+ PCI_EPC_BAR_RSVD_DMA_CTRL_MMIO = 0,
+};
+
+/**
+ * struct pci_epc_bar_rsvd_region - fixed subregion behind a BAR
+ * @type: reserved region type
+ * @offset: offset within the BAR aperture
+ * @size: size of the reserved region
+ */
+struct pci_epc_bar_rsvd_region {
+ enum pci_epc_bar_rsvd_region_type type;
+ resource_size_t offset;
+ resource_size_t size;
+};
+
/**
* struct pci_epc_bar_desc - hardware description for a BAR
* @type: the type of the BAR
@@ -213,11 +237,15 @@ enum pci_epc_bar_type {
* (If BARx is a 64-bit BAR that an EPF driver is not allowed to
* touch, then both BARx and BARx+1 must be set to type
* BAR_RESERVED.)
+ * @nr_rsvd_regions: number of fixed subregions described for BAR_RESERVED
+ * @rsvd_regions: fixed subregions behind BAR_RESERVED
*/
struct pci_epc_bar_desc {
enum pci_epc_bar_type type;
u64 fixed_size;
bool only_64bit;
+ u8 nr_rsvd_regions;
+ const struct pci_epc_bar_rsvd_region *rsvd_regions;
};
/**
--
2.51.0
More information about the Linux-rockchip
mailing list