[PATCH] phy: rockchip-snps-pcie3: add support for rockchip,phy-ref-use-pad
Vinod Koul
vkoul at kernel.org
Tue Jul 22 05:34:38 PDT 2025
On 16-07-25, 08:18, Damien Le Moal wrote:
> On 7/15/25 19:58, Rick Wertenbroek wrote:
> > &pcie30phy {
> > rockchip,rx-common-refclk-mode = <0 0 1 1>;
> > rockchip,phy-ref-use-pad = <0 1>;
> > clocks = <&cru PCLK_PCIE_COMBO_PIPE_PHY>, <&cru CLK_PHY0_REF_ALT_P>,
> > <&cru CLK_PHY0_REF_ALT_M>, <&cru CLK_PHY1_REF_ALT_P>,
> > <&cru CLK_PHY1_REF_ALT_M>;
> > clock-names = "pclk", "phy0_ref_alt_p",
> > "phy0_ref_alt_m", "phy1_ref_alt_p",
> > "phy1_ref_alt_m";
> > };
> > ---
> >
>
> This looks OK to me, but don't you need to also update the dt-bindings yaml to
> document this new "phy-ref-use-pad" property ?
Absolutely, without update to binding this is a no-go
--
~Vinod
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