[RESEND PATCH v9 1/4] PCI: rockchip: Use standard PCIe defines
Geraldo Nascimento
geraldogabriel at gmail.com
Tue Jul 1 05:03:31 PDT 2025
On Tue, Jul 01, 2025 at 09:54:51AM +0200, Philipp Stanner wrote:
> On Mon, 2025-06-30 at 19:24 -0300, Geraldo Nascimento wrote:
> > Current code uses custom-defined register offsets and bitfields for
> > standard PCIe registers. Change to using standard PCIe defines. Since
> > we are now using standard PCIe defines, drop unused custom-defined
> > ones,
> > which are now referenced from offset at added Capabilities Register.
>
> This could be phrased a bit more cleanly. At least I don't get exactly
> what "from offset" means. You mean you replace the unused custom ones?
> But if they're unused, why are they even being replaced?
Hi Philipp!
"from offset" means we use standard PCIe defines for registers that are
adjacent to Capabilities Register, and we reference them from the offset
at Capabilities Register.
No, all registers replaced are in use, unused in that context means they
(the custom-defined registers which can be referenced starting from
Capabilities Register address) become unused after the change, only.
>
>
> >
> > Suggested-By: Bjorn Helgaas <bhelgaas at google.com>
>
> s/By/by
Thanks for the capitalization catch. Unfortunately there's little I can do
now that Mani went ahead and applied the first two patches (directly
related to PCI subsystem).
Thanks,
Geraldo Nascimento
>
>
> P.
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