[PATCH] arm64: dts: rockchip: add dma-coherent for pcie and gmac of RK3576

[Shawn Lin]

在 2025/11/28 星期五 15:09, Shawn Lin 写道:
> The RK3576 SoC employs ARM CCI for maintaining cache coherency
> between the CPU cluster and high-speed peripherals including USB3,
> SATA, GMAC, and PCIe controllers. While the USB3 and SATA controllers
> were correctly marked as dma-coherent, the GMAC and PCIe nodes were
> overlooked.
> 
> Without dma-coherent, the kernel falls back to software cache maintenance
> for DMA operations, requiring explicit cache flushing and invalidating.
> This adds significant overhead that degrades performance in high-throughput
> workloads.
> 
> Add the missing dma-coherent properties to enable hardware coherency and
> avoid unnecessary software cache management overhead.
> 

Gentle ping... :)

> Signed-off-by: Shawn Lin <shawn.lin at rock-chips.com>
> ---
> Hi Heiko,
> 
> This patch needs U-boot support which was added on Apr 15 2025 at least.
> https://elixir.bootlin.com/u-boot/v2025.10/source/arch/arm/mach-rockchip/rk3576/rk3576.c#L156
> 
> Given that when the time USB3 and SATA were added, they set dma-coherent but without a
> CCI enabled U-boot, they were in fact broken due to no CCI support and no software cache
> maintenace when seeing dma-coherent. But there is no anyone complained about thes, so
> it should be ok that we don't need to bother ourselves.
> 
>   arch/arm64/boot/dts/rockchip/rk3576.dtsi | 4 ++++
>   1 file changed, 4 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/rockchip/rk3576.dtsi b/arch/arm64/boot/dts/rockchip/rk3576.dtsi
> index a86fc6b4..33d2e521 100644
> --- a/arch/arm64/boot/dts/rockchip/rk3576.dtsi
> +++ b/arch/arm64/boot/dts/rockchip/rk3576.dtsi
> @@ -709,6 +709,7 @@
>   			reset-names = "pwr", "pipe";
>   			#address-cells = <3>;
>   			#size-cells = <2>;
> +			dma-coherent;
>   			status = "disabled";
>   
>   			pcie0_intc: legacy-interrupt-controller {
> @@ -763,6 +764,7 @@
>   			reset-names = "pwr", "pipe";
>   			#address-cells = <3>;
>   			#size-cells = <2>;
> +			dma-coherent;
>   			status = "disabled";
>   
>   			pcie1_intc: legacy-interrupt-controller {
> @@ -1709,6 +1711,7 @@
>   			snps,mtl-rx-config = <&gmac0_mtl_rx_setup>;
>   			snps,mtl-tx-config = <&gmac0_mtl_tx_setup>;
>   			snps,tso;
> +			dma-coherent;
>   			status = "disabled";
>   
>   			mdio0: mdio {
> @@ -1756,6 +1759,7 @@
>   			snps,mtl-rx-config = <&gmac1_mtl_rx_setup>;
>   			snps,mtl-tx-config = <&gmac1_mtl_tx_setup>;
>   			snps,tso;
> +			dma-coherent;
>   			status = "disabled";
>   
>   			mdio1: mdio {