[PATCH v2 5/8] drm/rockchip: vop2: Enforce AFBC source alignment in plane_check

Chaoyi Chen chaoyi.chen at rock-chips.com
Sun Dec 7 18:48:24 PST 2025


Hello Nicolas, Daniel,

On 12/7/2025 4:45 AM, Nicolas Frattaroli wrote:
> From: Daniel Stone <daniels at collabora.com>
> 
> Planes can only source AFBC framebuffers at multiples of 4px wide on
> RK3566/RK3568. Instead of clipping on all SoCs when the user asks for an
> unaligned source rectangle, reject the configuration in the plane's
> atomic check on RK3566/RK3568 only.
> 
> Signed-off-by: Daniel Stone <daniels at collabora.com>
> [Make RK3566/RK3568 specific, reword message]
> Signed-off-by: Nicolas Frattaroli <nicolas.frattaroli at collabora.com>
> ---
>  drivers/gpu/drm/rockchip/rockchip_drm_vop2.c | 14 +++++++++-----
>  1 file changed, 9 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
> index bc1ed0ffede0..e23213337104 100644
> --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
> +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c
> @@ -1076,6 +1076,13 @@ static int vop2_plane_atomic_check(struct drm_plane *plane,
>  		return -EINVAL;
>  	}
>  
> +	if (vop2->version == VOP_VERSION_RK3568 && drm_is_afbc(fb->modifier) && src_w % 4) {
> +		drm_dbg_kms(vop2->drm,
> +			    "AFBC source rectangles must be 4-byte aligned; is %d\n",
> +			    src_w);
> +		return -EINVAL;
> +	}
> +
>  	return 0;
>  }
>  
> @@ -1237,11 +1244,8 @@ static void vop2_plane_atomic_update(struct drm_plane *plane,
>  	WARN_ON(src_w < 4);
>  	WARN_ON(src_h < 4);
>  
> -	if (afbc_en && src_w % 4) {
> -		drm_dbg_kms(vop2->drm, "vp%d %s src_w[%d] not 4 pixel aligned\n",
> -			    vp->id, win->data->name, src_w);
> -		src_w = ALIGN_DOWN(src_w, 4);
> -	}
> +	if (vop2->version == VOP_VERSION_RK3568 && drm_is_afbc(fb->modifier))
> +		WARN_ON(src_w % 4);
>  
>  	act_info = (src_h - 1) << 16 | ((src_w - 1) & 0xffff);
>  	dsp_info = (dsp_h - 1) << 16 | ((dsp_w - 1) & 0xffff);
> 

You haven't replied to Andy's comment yet [0].

[0] https://lore.kernel.org/dri-devel/7b4e26ec.75f3.19a77276b53.Coremail.andyshrk@163.com/

-- 
Best, 
Chaoyi



More information about the Linux-rockchip mailing list