[PATCH] PCI: dw-rockchip: Configure max payload size on host init

[Niklas Cassel]

On Thu, Apr 17, 2025 at 04:07:51PM +0800, Hans Zhang wrote:
> On 2025/4/17 15:48, Niklas Cassel wrote:
> 
> Hi Niklas and Shawn,
> 
> Thank you very much for your discussion and reply.
> 
> I tested it on RK3588 and our platform. By setting pci=pcie_bus_safe, the
> maximum MPS will be automatically matched in the end.
> 
> So is my patch no longer needed? For RK3588, does the customer have to
> configure CONFIG_PCIE_BUS_SAFE or pci=pcie_bus_safe?
> 
> Also, for pci-meson.c, can the meson_set_max_payload be deleted?

I think the only reason why this works is because
pcie_bus_configure_settings(), in the case of
pcie_bus_config == PCIE_BUS_SAFE, will walk the bus and set MPS in
the bridge to the lowest of the downstream devices:
https://github.com/torvalds/linux/blob/v6.15-rc2/drivers/pci/probe.c#L2994-L2999


So Hans, if you look at lspci for the other RCs/bridges that don't
have any downstream devices connected, do they also show DevCtl.MPS 256B
or do they still show 128B ?


One could argue that for all policies (execept for maybe PCIE_BUS_TUNE_OFF),
pcie_bus_configure_settings() should start off by initializing DevCtl.MPS to
DevCap.MPS (for the bridge itself), and after that pcie_bus_configure_settings()
can override it depending on policy, e.g. set MPS to 128B in case of
pcie_bus_config == PCIE_BUS_PEER2PEER, or walk the bus in case of
pcie_bus_config == PCIE_BUS_SAFE.

That way, we should be able to remove the setting for pci-meson.c as well.

Bjorn, thoughts?


Kind regards,
Niklas