[PATCH 3/3] phy: rockchip: Add Samsung HDMI/DP Combo PHY driver

Cristian Ciocaltea cristian.ciocaltea at collabora.com
Tue Jan 23 16:24:35 PST 2024


Hi Andy,

On 1/22/24 12:17, Andy Yan wrote:
> Hi Cristian:
> 
> On 1/20/24 03:38, Cristian Ciocaltea wrote:
>> Add driver for the Rockchip HDMI/eDP TX Combo PHY found on RK3588 SoC.

[...]

>> +static int rockchip_hdptx_phy_power_on(struct phy *phy)
>> +{
>> +    struct rockchip_hdptx_phy *hdptx = phy_get_drvdata(phy);
>> +    int bus_width = phy_get_bus_width(hdptx->phy);
>> +    int bit_rate = bus_width & DATA_RATE_MASK;
>> +    int ret;
>> +
>> +    dev_dbg(hdptx->dev, "%s bus_width=%x rate=%d\n",
>> +        __func__, bus_width, bit_rate);
>> +
>> +    ret = pm_runtime_resume_and_get(hdptx->dev);
>> +    if (ret) {
>> +        dev_err(hdptx->dev, "Failed to resume phy: %d\n", ret);
>> +        return ret;
>> +    }
>> +
>> +    if (bus_width & HDMI_EARC_MASK)
>> +        hdptx->earc_en = true;
>> +    else
>> +        hdptx->earc_en = false;
>> +
>> +    if (bus_width & HDMI_MODE_MASK) {
> 
> Here use phy->attrs.bus_width to indicate different work mode,
> we also use the same in our bsp, but not sure if it is the appropriate way.

Unfortunately the PHY API doesn't seem to provide a clean way to pass
arbitrary data.  Probably for the initial support we could simply drop
the 10-bit color depth, FRL and EARC features.

Thanks,
Cristian



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