[PATCH v5 1/4] dt-bindings: display: bridge: Add schema for Synopsys DW HDMI QP TX IP

[Cristian Ciocaltea]

On 8/31/24 4:58 PM, Heiko Stübner wrote:
> Hi,
> 
> Am Samstag, 31. August 2024, 08:16:26 CEST schrieb Krzysztof Kozlowski:
>> On Sat, Aug 31, 2024 at 12:55:29AM +0300, Cristian Ciocaltea wrote:
> 
>>> +  clocks:
>>> +    minItems: 4
>>> +    maxItems: 6
>>> +    items:
>>> +      - description: Peripheral/APB bus clock
>>> +      - description: EARC RX biphase clock
>>> +      - description: Reference clock
>>> +      - description: Audio interface clock
>>> +    additionalItems: true
>>
>> What is the usefulness of all this? How can you even be sure that each
>> implementation of this core will have exactly these clocks?
>>
>>> +
>>> +  clock-names:
>>> +    minItems: 4
>>> +    maxItems: 6
>>> +    items:
>>> +      - const: pclk
>>> +      - const: earc
>>> +      - const: ref
>>> +      - const: aud
>>> +    additionalItems: true
>>> +
>>> +  interrupts:
>>> +    minItems: 4
>>> +    maxItems: 5
>>> +    items:
>>> +      - description: AVP Unit interrupt
>>> +      - description: CEC interrupt
>>> +      - description: eARC RX interrupt
>>> +      - description: Main Unit interrupt
>>
>> If these are real pins, then this seems more possible, but
>> additionalItems does not make me happy.
> 
> So while not "pins", the interrupts are separately specified in the
> SoC's list of interrupts in the GIC:
> 
> RK3588 has:
> 
> 201  irq_hdmitx0_oavp
> 202  irq_hdmitx0_ocec
> 203  irq_hdmitx0_oearcrx
> 204  irq_hdmitx0_omain
> 392  irq_hdmitx0_hpd
> 
> and another set of all of them for hdmitx1
> 
> and RK3576 using the same hdmi IP has:
> 
> 370  irq_hdmitx_oavp
> 371  irq_hdmitx_ocec
> 372  irq_hdmitx_oearcrx
> 373  irq_hdmitx_omain
> 399  irq_hdmitx_hpd
> 
> so I guess the fifth interrupt is meant to be the hotplug?

Yep, that's for the hotplug detection.

> Though I guess this should be specificed in the name-list too.

My understanding from Andy was that HPD interrupt is Rockchip platform
specific, hence I made it part of rockchip,rk3588-dw-hdmi-qp.yaml.

> From the SoC's manual it looks like the controller is set up from
> different modules.
> Like AVP is the audio-video-packet-module, there is a Main and CEC Module
> as well as a eARC RX controller inside. I'd guess it might be possible
> other SoC vendors could leave out specific modules?
> 
> 
> TL;DR I think those clocks and interrupts are dependent on how the
> IP core was synthesized, so for now I'd think we can only guarantee
> that they are true for rk3588 and rk3576.
> 
> So I guess they should move to the rockchip-specific part of the binding
> until we have more hdmi-qp controllers in the field?

If that's the case, then we should simply drop the common binding
altogether for now.

Thanks,
Cristian