[PATCH RFC] regmap: maple: Switch to use irq-safe locking

[Mark Brown]

On Fri, Aug 16, 2024 at 11:11:27PM +0300, Cristian Ciocaltea wrote:

> The deadlock scenario indicated by lockdep actually points to the lock
> acquired by regcache_maple_exit(), which has been triggered during module
> unload operation, and the lock acquired by regcache_maple_write(), in the
> context of vop2_plane_atomic_update() called within the DRM stack.

So still within the interrupt context then, and due to the fact that the
register has not been accessed outside of interrupt context.  Reading or
writing any cached registers used in atomic context on init should do
that and avoid the issue I expect.  In general if you're going to use a
sparse cache you should ensure it's populated during init, like I said
in the prior mail providing defaults is the standard way to do that but
just an access should also work.
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