[PATCH 2/3] phy: rockchip-snps-pcie3: fix clearing PHP_GRF_PCIESEL_CON bits

Heiko Stuebner heiko at sntech.de
Thu Apr 4 12:26:48 PDT 2024


Am Donnerstag, 4. April 2024, 19:11:27 CEST schrieb Sebastian Reichel:
> From: Sebastian Reichel <sebastian.reichel at collabora.com>
> 
> Currently the PCIe v3 PHY driver only sets the pcie1ln_sel bits, but
> does not clear them because of an incorrect write mask. This fixes up
> the issue by using a newly introduced constant for the write mask.
> 
> While at it also introduces a proper GENMASK based constant for the
> PCIE30_PHY_MODE.
> 
> Fixes: 2e9bffc4f713 ("phy: rockchip: Support PCIe v3")
> Signed-off-by: Sebastian Reichel <sebastian.reichel at collabora.com>

after checking with the soc manual

Reviewed-by: Heiko Stuebner <heiko at sntech.de>





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