More RK817 questions

[Philip C]

Hi Peter
> 
> The way Mainline handles this is you tie the port power regulator to
> the phy. When the phy enters a mode that requires the port to be
> powered, it calls the regulator subsystem to enable that regulator.
> I've seen boards where the boost power is fed to a gpio regulator.
> That regulator is tied directly to any non-otg port and to the
> otg-switch. You then use the otg switch to control the otg port power,
> but if the gpio line isn't *also* powered you get nothing. I see that
> tablet dts has a host regulator, so you might have this situation. You
> can always set the boost, otg-switch, and host regulators to always-on
> to see if you get power at the port for testing purposes only.
> 
> You really need a schematic.
> 

This device has no dedicated USB chip.

The data lines connect straight to the RK3566.  It isn't possible for me 
to trace them, but they must do because I have used rkdevtool on the 
device (windows tool connecting directly to the SoC when there is no OS 
running).  The same tool works on the quartz64a so the USB data lines 
must connect straight to USB_OTG0_DP (R37) and USB_OTG0_DM (R38) just as 
they do on the quartz64a.

I have traced the 5V rail on the USB port, and, it connects to pin 55 
labelled USB/OTG on the RK817.

The RK3566 SoC also has pins USB_OTG0_VBUSDET (T38) and USB_OTG0_ID 
(T37) but I don't know specifically if or how they are used.

Would it be possible to help me create a dts for the USB/OTG port of 
this device based on OTG adapter detection within the SoC itself, and 
power for the port coming from the RK817 pin 55 please?

thanks, Philip