[PATCH] pinctrl/rockchip: re-fix RK3308 pinmux bits

[Luca Ceresoli]

Hello Jianqun,

Il giorno Sat, 1 Oct 2022 08:42:25 +0800
"jay.xu at rock-chips.com" <jay.xu at rock-chips.com> ha scritto:

> Hi Luca:
> 
> BR
> --------------
> jay.xu at rock-chips.com
> >Hello Jianqun Xu,
> >
> >On Fri, 30 Sep 2022 18:26:20 +0800
> >Jianqun Xu <jay.xu at rock-chips.com> wrote:
> >  
> >> Part of pins from RK3308 SoCs have two registers to do pinmux, one is
> >> the origin register with 2bits named by gpioxx_sel, and another with
> >> 3bits and named by gpioxx_sel_plus.  
> >
> >Are the "plus" registers documented anywhere?   
> 
> At RK3308 TRM CH5 GRF, 
> 
> GRF_SOC_CON13 
> 
> 3  RW  0x0 gpio2a2_sel_src_ctrl
>                   IOMUX control source selection.
>                  1'b0: use basic GPIO2A_IOMUX[gpio2a2_sel]
>                  1'b1: use gpio2a2_sel_plus instead of GPIO2A_IOMUX[gpio2a2_sel]
> 
> 2:0  RW  0x0 gpio2a2_sel_plus
>                      3'b000: GPIO2_A2
>                      3'b001: UART0_CTSN
>                      3'b010: SPI0_CLK
>                      3'b011: I2C2_SDA
>                      3'b100: Reserved
>                      3'b101: OWIRE_M2
> 
> Sorry I don't know about the trm you got from our company, if you cannot find this part,
> may require a new version ?

First of all: is a complete TRM available for public download?

I searched again, but didn't find any.

-- 
Luca Ceresoli, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com