[PATCH v3 04/15] dt-bindings: devfreq: rk3399_dmc: Specify idle params in nanoseconds
Krzysztof Kozlowski
krzysztof.kozlowski at canonical.com
Tue Mar 8 10:09:11 PST 2022
On 08/03/2022 01:09, Brian Norris wrote:
> It's inefficient to use the same number of cycles for all OPPs, since
> lower frequencies make for longer idle times. Let's specify the idle
> time instead, so software can pick the optimal number of cycles on its
> own.
>
> NB: these bindings aren't used anywhere yet.
>
> Signed-off-by: Brian Norris <briannorris at chromium.org>
> Reviewed-by: Rob Herring <robh at kernel.org>
> ---
>
> Changes in v3:
> * Add Reviewed-by
>
> Changes in v2:
> * New patch
>
> .../bindings/devfreq/rk3399_dmc.yaml | 50 +++++++++++++++++--
> 1 file changed, 45 insertions(+), 5 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/devfreq/rk3399_dmc.yaml b/Documentation/devicetree/bindings/devfreq/rk3399_dmc.yaml
> index 2904ae4115f3..6a33a7b44741 100644
> --- a/Documentation/devicetree/bindings/devfreq/rk3399_dmc.yaml
> +++ b/Documentation/devicetree/bindings/devfreq/rk3399_dmc.yaml
> @@ -56,42 +56,52 @@ properties:
> being used.
>
> rockchip,pd_idle:
> + deprecated: true
> $ref: /schemas/types.yaml#/definitions/uint32
> description:
> Configure the PD_IDLE value. Defines the power-down idle period in which
> memories are placed into power-down mode if bus is idle for PD_IDLE DFI
> clock cycles.
> + See also rockchip,pd-idle-ns.
>
> rockchip,sr_idle:
> + deprecated: true
> $ref: /schemas/types.yaml#/definitions/uint32
> description:
> Configure the SR_IDLE value. Defines the self-refresh idle period in
> which memories are placed into self-refresh mode if bus is idle for
> SR_IDLE * 1024 DFI clock cycles (DFI clocks freq is half of DRAM clock).
> Default value is "0".
> + See also rockchip,sr-idle-ns.
>
> rockchip,sr_mc_gate_idle:
> + deprecated: true
> $ref: /schemas/types.yaml#/definitions/uint32
> description:
> Defines the memory self-refresh and controller clock gating idle period.
> Memories are placed into self-refresh mode and memory controller clock
> arg gating started if bus is idle for sr_mc_gate_idle*1024 DFI clock
> cycles.
> + See also rockchip,sr-mc-gate-idle-ns.
>
> rockchip,srpd_lite_idle:
> + deprecated: true
> $ref: /schemas/types.yaml#/definitions/uint32
> description:
> Defines the self-refresh power down idle period in which memories are
> placed into self-refresh power down mode if bus is idle for
> srpd_lite_idle * 1024 DFI clock cycles. This parameter is for LPDDR4
> only.
> + See also rockchip,srpd-lite-idle-ns.
>
> rockchip,standby_idle:
> + deprecated: true
> $ref: /schemas/types.yaml#/definitions/uint32
> description:
> Defines the standby idle period in which memories are placed into
> self-refresh mode. The controller, pi, PHY and DRAM clock will be gated
> if bus is idle for standby_idle * DFI clock cycles.
> + See also rockchip,standby-idle-ns.
>
> rockchip,dram_dll_dis_freq:
> deprecated: true
> @@ -260,6 +270,36 @@ properties:
> When the DRAM type is LPDDR4, this parameter defines the PHY side ODT
> strength. Default value is 60.
>
> + rockchip,pd-idle-ns:
> + description:
> + Configure the PD_IDLE value in nanoseconds. Defines the power-down idle
> + period in which memories are placed into power-down mode if bus is idle
> + for PD_IDLE nanoseconds.
> +
> + rockchip,sr-idle-ns:
> + description:
> + Configure the SR_IDLE value in nanoseconds. Defines the self-refresh idle
> + period in which memories are placed into self-refresh mode if bus is idle
> + for SR_IDLE nanoseconds. Default value is "0".
Use "default: 0".
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski at canonical.com>
Best regards,
Krzysztof
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